mirror of
https://github.com/AsahiLinux/u-boot
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401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
138 lines
2.5 KiB
C
138 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2010, 2018
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* Allied Telesis <www.alliedtelesis.com>
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*/
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#include <common.h>
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#include <init.h>
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#include <miiphy.h>
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#include <net.h>
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#include <netdev.h>
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#include <led.h>
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#include <asm/global_data.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/gpio.h>
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#define SBX81LIFXCAT_OE_LOW (~0)
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#define SBX81LIFXCAT_OE_HIGH (~BIT(11))
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#define SBX81LIFXCAT_OE_VAL_LOW (0)
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#define SBX81LIFXCAT_OE_VAL_HIGH (BIT(11))
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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/*
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* default gpio configuration
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* There are maximum 64 gpios controlled through 2 sets of registers
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* the below configuration configures mainly initial LED status
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*/
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mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW,
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SBX81LIFXCAT_OE_VAL_HIGH,
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SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH);
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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MPP0_SPI_SCn,
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MPP1_SPI_MOSI,
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MPP2_SPI_SCK,
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MPP3_SPI_MISO,
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MPP4_NF_IO6,
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MPP5_NF_IO7,
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MPP6_SYSRST_OUTn,
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MPP7_GPO,
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MPP8_TW_SDA,
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MPP9_TW_SCK,
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP12_GPO,
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MPP13_UART1_TXD,
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MPP14_UART1_RXD,
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MPP15_GPIO,
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MPP16_GPIO,
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MPP17_GPIO,
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MPP18_NF_IO0,
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MPP19_NF_IO1,
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MPP20_GE1_0,
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MPP21_GE1_1,
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MPP22_GE1_2,
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MPP23_GE1_3,
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MPP24_GE1_4,
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MPP25_GE1_5,
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MPP26_GE1_6,
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MPP27_GE1_7,
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MPP28_GE1_8,
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MPP29_GE1_9,
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MPP30_GE1_10,
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MPP31_GE1_11,
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MPP32_GE1_12,
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MPP33_GE1_13,
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MPP34_GPIO,
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MPP35_GPIO,
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MPP36_GPIO,
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MPP37_GPIO,
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MPP38_GPIO,
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MPP39_GPIO,
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MPP40_GPIO,
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MPP41_GPIO,
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MPP42_GPIO,
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MPP43_GPIO,
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MPP44_GPIO,
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MPP45_GPIO,
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MPP46_GPIO,
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MPP47_GPIO,
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MPP48_GPIO,
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MPP49_GPIO,
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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/* automatically defined by kirkwood config.h */
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void reset_phy(void)
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{
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}
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#endif
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#ifdef CONFIG_MV88E61XX_SWITCH
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int mv88e61xx_hw_reset(struct phy_device *phydev)
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{
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phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
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return 0;
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}
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#endif
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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struct udevice *dev;
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int ret;
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ret = led_get_by_label("status:ledp", &dev);
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if (!ret)
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led_set_state(dev, LEDST_ON);
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ret = led_get_by_label("status:ledn", &dev);
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if (!ret)
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led_set_state(dev, LEDST_OFF);
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return 0;
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}
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#endif
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