mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 18:59:44 +00:00
0488a5e117
This patch changes the compatible string for sdhci node, adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node. Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
661 lines
13 KiB
Text
661 lines
13 KiB
Text
/*
|
|
* dts file for Xilinx ZynqMP ZCU102
|
|
*
|
|
* (C) Copyright 2015, Xilinx, Inc.
|
|
*
|
|
* Michal Simek <michal.simek@xilinx.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include "zynqmp.dtsi"
|
|
#include "zynqmp-clk.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "ZynqMP ZCU102 RevA";
|
|
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
|
|
|
|
aliases {
|
|
ethernet0 = &gem3;
|
|
gpio0 = &gpio;
|
|
i2c0 = &i2c0;
|
|
i2c1 = &i2c1;
|
|
mmc0 = &sdhci1;
|
|
rtc0 = &rtc;
|
|
serial0 = &uart0;
|
|
serial1 = &uart1;
|
|
serial2 = &dcc;
|
|
spi0 = &qspi;
|
|
usb0 = &usb0;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "earlycon";
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
autorepeat;
|
|
sw19 {
|
|
label = "sw19";
|
|
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
|
|
linux,code = <108>; /* down */
|
|
gpio-key,wakeup;
|
|
autorepeat;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
heartbeat_led {
|
|
label = "heartbeat";
|
|
gpios = <&gpio 23 0>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
};
|
|
|
|
&can1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&dcc {
|
|
status = "okay";
|
|
};
|
|
|
|
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
|
|
&fpd_dma_chan1 {
|
|
status = "okay";
|
|
xlnx,include-sg; /* for testing purpose */
|
|
xlnx,overfetch; /* for testing purpose */
|
|
xlnx,ratectrl = <0>; /* for testing purpose */
|
|
xlnx,src-issue = <31>;
|
|
};
|
|
|
|
&fpd_dma_chan2 {
|
|
status = "okay";
|
|
xlnx,ratectrl = <100>; /* for testing purpose */
|
|
xlnx,src-issue = <4>; /* for testing purpose */
|
|
};
|
|
|
|
&fpd_dma_chan3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&fpd_dma_chan4 {
|
|
status = "okay";
|
|
xlnx,include-sg; /* for testing purpose */
|
|
};
|
|
|
|
&fpd_dma_chan5 {
|
|
status = "okay";
|
|
};
|
|
|
|
&fpd_dma_chan6 {
|
|
status = "okay";
|
|
xlnx,include-sg; /* for testing purpose */
|
|
};
|
|
|
|
&fpd_dma_chan7 {
|
|
status = "okay";
|
|
};
|
|
|
|
&fpd_dma_chan8 {
|
|
status = "okay";
|
|
xlnx,include-sg; /* for testing purpose */
|
|
};
|
|
|
|
&gem3 {
|
|
status = "okay";
|
|
local-mac-address = [00 0a 35 00 02 90];
|
|
phy-handle = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
phy0: phy@21 {
|
|
reg = <21>;
|
|
ti,rx-internal-delay = <0x8>;
|
|
ti,tx-internal-delay = <0xa>;
|
|
ti,fifo-depth = <0x1>;
|
|
};
|
|
};
|
|
|
|
&gpio {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
tca6416_u97: gpio@20 {
|
|
/*
|
|
* Enable all GTs to out from U-Boot
|
|
* i2c mw 20 6 0 - setup IO to output
|
|
* i2c mw 20 2 ef - setup output values on pins 0-7
|
|
* i2c mw 20 3 ff - setup output values on pins 10-17
|
|
*/
|
|
compatible = "ti,tca6416";
|
|
reg = <0x20>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
/*
|
|
* IRQ not connected
|
|
* Lines:
|
|
* 0 - PS_GTR_LAN_SEL0
|
|
* 1 - PS_GTR_LAN_SEL1
|
|
* 2 - PS_GTR_LAN_SEL2
|
|
* 3 - PS_GTR_LAN_SEL3
|
|
* 4 - PCI_CLK_DIR_SEL
|
|
* 5 - IIC_MUX_RESET_B
|
|
* 6 - GEM3_EXP_RESET_B
|
|
* 7, 10 - 17 - not connected
|
|
*/
|
|
|
|
gtr_sel0 {
|
|
gpio-hog;
|
|
gpios = <0 0>;
|
|
output-high; /* PCIE = 0, DP = 1 */
|
|
line-name = "sel0";
|
|
};
|
|
gtr_sel1 {
|
|
gpio-hog;
|
|
gpios = <1 0>;
|
|
output-high; /* PCIE = 0, DP = 1 */
|
|
line-name = "sel1";
|
|
};
|
|
gtr_sel2 {
|
|
gpio-hog;
|
|
gpios = <2 0>;
|
|
output-high; /* PCIE = 0, USB0 = 1 */
|
|
line-name = "sel2";
|
|
};
|
|
gtr_sel3 {
|
|
gpio-hog;
|
|
gpios = <3 0>;
|
|
output-high; /* PCIE = 0, SATA = 1 */
|
|
line-name = "sel3";
|
|
};
|
|
};
|
|
|
|
tca6416_u61: gpio@21 { /* FIXME enable it by i2c mw 21 6 0 */
|
|
compatible = "ti,tca6416";
|
|
reg = <0x21>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
/*
|
|
* IRQ not connected
|
|
* Lines:
|
|
* 0 - VCCPSPLL_EN
|
|
* 1 - MGTRAVCC_EN
|
|
* 2 - MGTRAVTT_EN
|
|
* 3 - VCCPSDDRPLL_EN
|
|
* 4 - MIO26_PMU_INPUT_LS
|
|
* 5 - PL_PMBUS_ALERT
|
|
* 6 - PS_PMBUS_ALERT
|
|
* 7 - MAXIM_PMBUS_ALERT
|
|
* 10 - PL_DDR4_VTERM_EN
|
|
* 11 - PL_DDR4_VPP_2V5_EN
|
|
* 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
|
|
* 13 - PS_DIMM_SUSPEND_EN
|
|
* 14 - PS_DDR4_VTERM_EN
|
|
* 15 - PS_DDR4_VPP_2V5_EN
|
|
* 16 - 17 - not connected
|
|
*/
|
|
};
|
|
|
|
i2cswitch@75 { /* u60 */
|
|
compatible = "nxp,pca9544";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x75>;
|
|
i2c@0 { /* i2c mw 75 0 1 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0>;
|
|
/* PS_PMBUS */
|
|
ina226@40 { /* u76 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x40>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@41 { /* u77 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x41>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@42 { /* u78 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x42>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@43 { /* u87 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x43>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@44 { /* u85 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x44>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@45 { /* u86 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x45>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@46 { /* u93 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x46>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@47 { /* u88 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x47>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@4a { /* u15 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x4a>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@4b { /* u92 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x4b>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
};
|
|
i2c@1 { /* i2c mw 75 0 1 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
/* PL_PMBUS */
|
|
ina226@40 { /* u79 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x40>;
|
|
shunt-resistor = <2000>;
|
|
};
|
|
ina226@41 { /* u81 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x41>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@42 { /* u80 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x42>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@43 { /* u84 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x43>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@44 { /* u16 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x44>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@45 { /* u65 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x45>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@46 { /* u74 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x46>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
ina226@47 { /* u75 */
|
|
compatible = "ti,ina226";
|
|
reg = <0x47>;
|
|
shunt-resistor = <5000>;
|
|
};
|
|
};
|
|
i2c@2 { /* i2c mw 75 0 1 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <2>;
|
|
/* MAXIM_PMBUS - 00 */
|
|
max15301@a { /* u46 */
|
|
compatible = "max15301";
|
|
reg = <0xa>;
|
|
};
|
|
max15303@b { /* u4 */
|
|
compatible = "max15303";
|
|
reg = <0xb>;
|
|
};
|
|
max15303@10 { /* u13 */
|
|
compatible = "max15303";
|
|
reg = <0x10>;
|
|
};
|
|
max15301@13 { /* u47 */
|
|
compatible = "max15301";
|
|
reg = <0x13>;
|
|
};
|
|
max15303@14 { /* u7 */
|
|
compatible = "max15303";
|
|
reg = <0x14>;
|
|
};
|
|
max15303@15 { /* u6 */
|
|
compatible = "max15303";
|
|
reg = <0x15>;
|
|
};
|
|
max15303@16 { /* u10 */
|
|
compatible = "max15303";
|
|
reg = <0x16>;
|
|
};
|
|
max15303@17 { /* u9 */
|
|
compatible = "max15303";
|
|
reg = <0x17>;
|
|
};
|
|
max15301@18 { /* u63 */
|
|
compatible = "max15301";
|
|
reg = <0x18>;
|
|
};
|
|
max15303@1a { /* u49 */
|
|
compatible = "max15303";
|
|
reg = <0x1a>;
|
|
};
|
|
max15303@1d { /* u18 */
|
|
compatible = "max15303";
|
|
reg = <0x1d>;
|
|
};
|
|
max15303@20 { /* u8 */
|
|
compatible = "max15303";
|
|
status = "disabled"; /* unreachable */
|
|
reg = <0x20>;
|
|
};
|
|
|
|
/* drivers/hwmon/pmbus/Kconfig:86: be called max20751.
|
|
drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
|
|
*/
|
|
max20751@72 { /* u95 FIXME - not detected */
|
|
compatible = "max20751";
|
|
reg = <0x72>;
|
|
};
|
|
max20751@73 { /* u96 FIXME - not detected */
|
|
compatible = "max20751";
|
|
reg = <0x73>;
|
|
};
|
|
};
|
|
/* Bus 3 is not connected */
|
|
};
|
|
|
|
/* FIXME PMOD - j160 */
|
|
/* FIXME MSP430F - u41 - not detected */
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
/* FIXME PL i2c via PCA9306 - u45 */
|
|
/* FIXME MSP430 - u41 - not detected */
|
|
i2cswitch@74 { /* u34 */
|
|
compatible = "nxp,pca9548";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x74>;
|
|
i2c@0 { /* i2c mw 74 0 1 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0>;
|
|
/*
|
|
* IIC_EEPROM 1kB memory which uses 256B blocks
|
|
* where every block has different address.
|
|
* 0 - 256B address 0x54
|
|
* 256B - 512B address 0x55
|
|
* 512B - 768B address 0x56
|
|
* 768B - 1024B address 0x57
|
|
*/
|
|
eeprom@54 { /* u23 */
|
|
compatible = "at,24c08";
|
|
reg = <0x54>;
|
|
};
|
|
};
|
|
i2c@1 { /* i2c mw 74 0 2 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
si5341: clock-generator1@36 { /* SI5341 - u69 */
|
|
compatible = "si5341";
|
|
reg = <0x36>;
|
|
};
|
|
|
|
};
|
|
i2c@2 { /* i2c mw 74 0 4 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <2>;
|
|
si570_1: clock-generator2@5d { /* USER SI570 - u42 */
|
|
#clock-cells = <0>;
|
|
compatible = "silabs,si570";
|
|
reg = <0x5d>;
|
|
temperature-stability = <50>;
|
|
factory-fout = <300000000>;
|
|
clock-frequency = <300000000>;
|
|
};
|
|
};
|
|
i2c@3 { /* i2c mw 74 0 8 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <3>;
|
|
si570_2: clock-generator3@5d { /* USER MGT SI570 - u56 */
|
|
#clock-cells = <0>;
|
|
compatible = "silabs,si570";
|
|
reg = <0x5d>;
|
|
temperature-stability = <50>; /* copy from zc702 */
|
|
factory-fout = <156250000>;
|
|
clock-frequency = <148500000>;
|
|
};
|
|
};
|
|
i2c@4 { /* i2c mw 74 0 10 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <4>;
|
|
si5328: clock-generator4@69 {/* SI5328 - u20 */
|
|
compatible = "silabs,si5328";
|
|
reg = <0x69>;
|
|
};
|
|
};
|
|
/* 5 - 7 unconnected */
|
|
};
|
|
|
|
i2cswitch@75 {
|
|
compatible = "nxp,pca9548"; /* u135 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x75>;
|
|
|
|
i2c@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0>;
|
|
/* HPC0_IIC */
|
|
};
|
|
i2c@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
/* HPC1_IIC */
|
|
};
|
|
i2c@2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <2>;
|
|
/* SYSMON */
|
|
};
|
|
i2c@3 { /* i2c mw 75 0 8 */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <3>;
|
|
/* DDR4 SODIMM */
|
|
dev@19 { /* u-boot detection */
|
|
compatible = "xxx";
|
|
reg = <0x19>;
|
|
};
|
|
dev@30 { /* u-boot detection */
|
|
compatible = "xxx";
|
|
reg = <0x30>;
|
|
};
|
|
dev@35 { /* u-boot detection */
|
|
compatible = "xxx";
|
|
reg = <0x35>;
|
|
};
|
|
dev@36 { /* u-boot detection */
|
|
compatible = "xxx";
|
|
reg = <0x36>;
|
|
};
|
|
dev@51 { /* u-boot detection - maybe SPD */
|
|
compatible = "xxx";
|
|
reg = <0x51>;
|
|
};
|
|
};
|
|
i2c@4 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <4>;
|
|
/* SEP 3 */
|
|
};
|
|
i2c@5 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <5>;
|
|
/* SEP 2 */
|
|
};
|
|
i2c@6 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <6>;
|
|
/* SEP 1 */
|
|
};
|
|
i2c@7 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <7>;
|
|
/* SEP 0 */
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
/* status = "okay"; */
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
is-dual = <1>;
|
|
flash@0 {
|
|
compatible = "m25p80"; /* 32MB */
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x0>;
|
|
spi-tx-bus-width = <1>;
|
|
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
|
|
spi-max-frequency = <108000000>; /* Based on DC1 spec */
|
|
partition@qspi-fsbl-uboot { /* for testing purpose */
|
|
label = "qspi-fsbl-uboot";
|
|
reg = <0x0 0x100000>;
|
|
};
|
|
partition@qspi-linux { /* for testing purpose */
|
|
label = "qspi-linux";
|
|
reg = <0x100000 0x500000>;
|
|
};
|
|
partition@qspi-device-tree { /* for testing purpose */
|
|
label = "qspi-device-tree";
|
|
reg = <0x600000 0x20000>;
|
|
};
|
|
partition@qspi-rootfs { /* for testing purpose */
|
|
label = "qspi-rootfs";
|
|
reg = <0x620000 0x5E0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rtc {
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
/* SATA OOB timing settings */
|
|
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
|
|
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
|
|
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
|
|
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
|
|
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
|
|
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
|
|
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
|
|
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
|
|
};
|
|
|
|
/* SD1 with level shifter */
|
|
&sdhci1 {
|
|
status = "okay";
|
|
no-1-8-v; /* for 1.0 silicon */
|
|
xlnx,mio_bank = <1>;
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
};
|
|
|
|
/* ULPI SMSC USB3320 */
|
|
&usb0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&dwc3_0 {
|
|
status = "okay";
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&xilinx_drm {
|
|
status = "okay";
|
|
clocks = <&si570_1>;
|
|
};
|
|
|
|
&xlnx_dp {
|
|
status = "okay";
|
|
};
|
|
|
|
&xlnx_dp_sub {
|
|
status = "okay";
|
|
xlnx,vid-clk-pl;
|
|
};
|
|
|
|
&xlnx_dp_snd_pcm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&xlnx_dp_snd_pcm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&xlnx_dp_snd_card {
|
|
status = "okay";
|
|
};
|
|
|
|
&xlnx_dp_snd_codec0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&xlnx_dpdma {
|
|
status = "okay";
|
|
};
|