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https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
175 lines
5 KiB
C
175 lines
5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2009 Wind River Systems, Inc.
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* Tom Rix <Tom.Rix@windriver.com>
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*
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* This is file is based on
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* repository git.gitorious.org/u-boot-omap3/mainline.git,
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* branch omap3-dev-usb, file drivers/usb/gadget/twl4030_usb.c
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*
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* This is the unique part of its copyright :
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*
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* ------------------------------------------------------------------------
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*
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* * (C) Copyright 2009 Atin Malaviya (atin.malaviya@gmail.com)
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*
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* Based on: twl4030_usb.c in linux 2.6 (drivers/i2c/chips/twl4030_usb.c)
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* Copyright (C) 2004-2007 Texas Instruments
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* Copyright (C) 2008 Nokia Corporation
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* Contact: Felipe Balbi <felipe.balbi@nokia.com>
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*
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* Author: Atin Malaviya (atin.malaviya@gmail.com)
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*
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* ------------------------------------------------------------------------
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*/
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#include <twl4030.h>
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/* Defines for bits in registers */
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#define OPMODE_MASK (3 << 3)
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#define XCVRSELECT_MASK (3 << 0)
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#define CARKITMODE (1 << 2)
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#define OTG_ENAB (1 << 5)
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#define PHYPWD (1 << 0)
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#define CLOCKGATING_EN (1 << 2)
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#define CLK32K_EN (1 << 1)
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#define REQ_PHY_DPLL_CLK (1 << 0)
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#define PHY_DPLL_CLK (1 << 0)
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static int twl4030_usb_write(u8 address, u8 data)
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{
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int ret;
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ret = twl4030_i2c_write_u8(TWL4030_CHIP_USB, address, data);
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if (ret != 0)
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printf("TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
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return ret;
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}
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static int twl4030_usb_read(u8 address)
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{
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u8 data;
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int ret;
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ret = twl4030_i2c_read_u8(TWL4030_CHIP_USB, address, &data);
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if (ret == 0)
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ret = data;
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else
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printf("TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
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return ret;
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}
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static void twl4030_usb_ldo_init(void)
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{
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/* Enable writing to power configuration registers */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, 0xC0);
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, 0x0C);
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/* put VUSB3V1 LDO in active state */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB_DEDICATED2, 0x00);
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/* input to VUSB3V1 LDO is from VBAT, not VBUS */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB_DEDICATED1, 0x14);
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/* turn on 3.1V regulator */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP, 0x20);
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB3V1_TYPE, 0x00);
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/* turn on 1.5V regulator */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP, 0x20);
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB1V5_TYPE, 0x00);
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/* turn on 1.8V regulator */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP, 0x20);
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
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TWL4030_PM_RECEIVER_VUSB1V8_TYPE, 0x00);
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/* disable access to power configuration registers */
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, 0x00);
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}
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static void twl4030_phy_power(void)
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{
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u8 pwr, clk;
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/* Power the PHY */
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pwr = twl4030_usb_read(TWL4030_USB_PHY_PWR_CTRL);
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pwr &= ~PHYPWD;
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twl4030_usb_write(TWL4030_USB_PHY_PWR_CTRL, pwr);
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/* Enable clocks */
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clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
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clk |= CLOCKGATING_EN | CLK32K_EN;
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twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
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}
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/*
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* Initiaze the ULPI interface
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* ULPI : Universal Transceiver Macrocell Low Pin Interface
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* An interface between the USB link controller like musb and the
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* the PHY or transceiver that drives the actual bus.
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*/
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int twl4030_usb_ulpi_init(void)
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{
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long timeout = 1000 * 1000; /* 1 sec */;
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u8 clk, sts, pwr;
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/* twl4030 ldo init */
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twl4030_usb_ldo_init();
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/* Enable the twl4030 phy */
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twl4030_phy_power();
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/* Enable DPLL to access PHY registers over I2C */
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clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
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clk |= REQ_PHY_DPLL_CLK;
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twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
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/* Check if the PHY DPLL is locked */
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sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
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while (!(sts & PHY_DPLL_CLK) && 0 < timeout) {
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udelay(10);
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sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
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timeout -= 10;
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}
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/* Final check */
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sts = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL_STS);
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if (!(sts & PHY_DPLL_CLK)) {
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printf("Error:TWL4030:USB Timeout setting PHY DPLL clock\n");
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return -1;
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}
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/*
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* There are two circuit blocks attached to the PHY,
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* Carkit and USB OTG. Disable Carkit and enable USB OTG
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*/
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twl4030_usb_write(TWL4030_USB_IFC_CTRL_CLR, CARKITMODE);
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pwr = twl4030_usb_read(TWL4030_USB_POWER_CTRL);
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pwr |= OTG_ENAB;
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twl4030_usb_write(TWL4030_USB_POWER_CTRL_SET, pwr);
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/* Clear the opmode bits to ensure normal encode */
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twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, OPMODE_MASK);
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/* Clear the xcvrselect bits to enable the high speed transeiver */
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twl4030_usb_write(TWL4030_USB_FUNC_CTRL_CLR, XCVRSELECT_MASK);
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/* Let ULPI control the DPLL clock */
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clk = twl4030_usb_read(TWL4030_USB_PHY_CLK_CTRL);
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clk &= ~REQ_PHY_DPLL_CLK;
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twl4030_usb_write(TWL4030_USB_PHY_CLK_CTRL, clk);
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return 0;
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}
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