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037ef53cf0
xilinx: - Allow booting bigger kernels till 100MB zynqmp: - DT updates (reset IDs) - Remove unneeded low level uart initialization from psu_init* - Enable PWM features - Add support for 1EG device serial_zynq: - Change fifo behavior in DEBUG mode zynq_sdhci: - Fix BASECLK setting calculation clk_zynqmp: - Add support for showing video clock gpio: - Update slg driver to handle DT flags net: - Update ethernet_id code to support also DM_ETH_PHY - Add support for DM_ETH_PHY in gem driver - Enable dynamic mode for SGMII config in gem driver pwm: - Add driver for cadence PWM versal: - Add support for reserved memory firmware: - Handle PD enabling for SPL - Add support for IOUSLCR SGMII configurations include: - Sync phy.h with Linux - Update xilinx power domain dt binding headers -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYkxUZwAKCRDKSWXLKUoM IXJ2AKCQcoFK7wanCCvZfuEJCSwO5E4eCACginE2CFVXKcY1P8ta4ESusjY2TH0= =HOoS -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.07-rc1 v2 xilinx: - Allow booting bigger kernels till 100MB zynqmp: - DT updates (reset IDs) - Remove unneeded low level uart initialization from psu_init* - Enable PWM features - Add support for 1EG device serial_zynq: - Change fifo behavior in DEBUG mode zynq_sdhci: - Fix BASECLK setting calculation clk_zynqmp: - Add support for showing video clock gpio: - Update slg driver to handle DT flags net: - Update ethernet_id code to support also DM_ETH_PHY - Add support for DM_ETH_PHY in gem driver - Enable dynamic mode for SGMII config in gem driver pwm: - Add driver for cadence PWM versal: - Add support for reserved memory firmware: - Handle PD enabling for SPL - Add support for IOUSLCR SGMII configurations include: - Sync phy.h with Linux - Update xilinx power domain dt binding headers |
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| .. | ||
| altera | ||
| analogbits | ||
| aspeed | ||
| at91 | ||
| exynos | ||
| imx | ||
| intel | ||
| mediatek | ||
| meson | ||
| microchip | ||
| mtmips | ||
| mvebu | ||
| owl | ||
| renesas | ||
| rockchip | ||
| sifive | ||
| sunxi | ||
| tegra | ||
| ti | ||
| uniphier | ||
| clk-cdce9xx.c | ||
| clk-composite.c | ||
| clk-divider.c | ||
| clk-fixed-factor.c | ||
| clk-gate.c | ||
| clk-hsdk-cgu.c | ||
| clk-mux.c | ||
| clk-uclass.c | ||
| clk-xlnx-clock-wizard.c | ||
| clk.c | ||
| clk_bcm6345.c | ||
| clk_boston.c | ||
| clk_fixed_factor.c | ||
| clk_fixed_rate.c | ||
| clk_k210.c | ||
| clk_octeon.c | ||
| clk_pic32.c | ||
| clk_sandbox.c | ||
| clk_sandbox_ccf.c | ||
| clk_sandbox_test.c | ||
| clk_scmi.c | ||
| clk_stm32f.c | ||
| clk_stm32h7.c | ||
| clk_stm32mp1.c | ||
| clk_versaclock.c | ||
| clk_versal.c | ||
| clk_vexpress_osc.c | ||
| clk_zynq.c | ||
| clk_zynqmp.c | ||
| ics8n3qv01.c | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_clk.c | ||
| mpc83xx_clk.h | ||