mirror of
https://github.com/AsahiLinux/u-boot
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1a4596601f
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
242 lines
5.2 KiB
C
242 lines
5.2 KiB
C
/*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/control_regs.h>
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#include <asm/processor.h>
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#include <asm/processor-flags.h>
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#include <asm/interrupt.h>
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#include <linux/compiler.h>
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/*
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* Constructor for a conventional segment GDT (or LDT) entry
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* This is a macro so it can be used in initialisers
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*/
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#define GDT_ENTRY(flags, base, limit) \
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((((base) & 0xff000000ULL) << (56-24)) | \
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(((flags) & 0x0000f0ffULL) << 40) | \
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(((limit) & 0x000f0000ULL) << (48-16)) | \
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(((base) & 0x00ffffffULL) << 16) | \
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(((limit) & 0x0000ffffULL)))
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struct gdt_ptr {
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u16 len;
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u32 ptr;
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} __packed;
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static void load_ds(u32 segment)
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{
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asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
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}
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static void load_es(u32 segment)
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{
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asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE));
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}
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static void load_fs(u32 segment)
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{
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asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
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}
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static void load_gs(u32 segment)
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{
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asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
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}
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static void load_ss(u32 segment)
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{
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asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE));
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}
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static void load_gdt(const u64 *boot_gdt, u16 num_entries)
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{
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struct gdt_ptr gdt;
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gdt.len = (num_entries * 8) - 1;
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gdt.ptr = (u32)boot_gdt;
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asm volatile("lgdtl %0\n" : : "m" (gdt));
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}
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void setup_gdt(gd_t *id, u64 *gdt_addr)
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{
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/* CS: code, read/execute, 4 GB, base 0 */
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gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
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/* DS: data, read/write, 4 GB, base 0 */
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gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
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/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
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id->arch.gd_addr = id;
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gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
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(ulong)&id->arch.gd_addr, 0xfffff);
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/* 16-bit CS: code, read/execute, 64 kB, base 0 */
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gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
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/* 16-bit DS: data, read/write, 64 kB, base 0 */
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gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
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load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
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load_ds(X86_GDT_ENTRY_32BIT_DS);
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load_es(X86_GDT_ENTRY_32BIT_DS);
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load_gs(X86_GDT_ENTRY_32BIT_DS);
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load_ss(X86_GDT_ENTRY_32BIT_DS);
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load_fs(X86_GDT_ENTRY_32BIT_FS);
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}
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int __weak x86_cleanup_before_linux(void)
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{
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#ifdef CONFIG_BOOTSTAGE_STASH
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bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH,
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CONFIG_BOOTSTAGE_STASH_SIZE);
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#endif
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return 0;
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}
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int x86_cpu_init_f(void)
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{
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const u32 em_rst = ~X86_CR0_EM;
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const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
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/* initialize FPU, reset EM, set MP and NE */
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asm ("fninit\n" \
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"movl %%cr0, %%eax\n" \
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"andl %0, %%eax\n" \
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"orl %1, %%eax\n" \
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"movl %%eax, %%cr0\n" \
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: : "i" (em_rst), "i" (mp_ne_set) : "eax");
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return 0;
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}
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int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
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int x86_cpu_init_r(void)
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{
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/* Initialize core interrupt and exception functionality of CPU */
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cpu_init_interrupts();
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return 0;
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}
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int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
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void x86_enable_caches(void)
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{
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_NW | X86_CR0_CD);
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write_cr0(cr0);
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wbinvd();
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}
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void enable_caches(void) __attribute__((weak, alias("x86_enable_caches")));
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void x86_disable_caches(void)
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{
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unsigned long cr0;
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cr0 = read_cr0();
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cr0 |= X86_CR0_NW | X86_CR0_CD;
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wbinvd();
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write_cr0(cr0);
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wbinvd();
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}
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void disable_caches(void) __attribute__((weak, alias("x86_disable_caches")));
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int x86_init_cache(void)
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{
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enable_caches();
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return 0;
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}
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int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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printf("resetting ...\n");
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/* wait 50 ms */
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udelay(50000);
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disable_interrupts();
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reset_cpu(0);
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/*NOTREACHED*/
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return 0;
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}
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void flush_cache(unsigned long dummy1, unsigned long dummy2)
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{
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asm("wbinvd\n");
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}
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void __attribute__ ((regparm(0))) generate_gpf(void);
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/* segment 0x70 is an arbitrary segment which does not exist */
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asm(".globl generate_gpf\n"
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".hidden generate_gpf\n"
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".type generate_gpf, @function\n"
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"generate_gpf:\n"
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"ljmp $0x70, $0x47114711\n");
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void __reset_cpu(ulong addr)
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{
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printf("Resetting using x86 Triple Fault\n");
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set_vector(13, generate_gpf); /* general protection fault handler */
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set_vector(8, generate_gpf); /* double fault handler */
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generate_gpf(); /* start the show */
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}
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void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
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int dcache_status(void)
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{
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return !(read_cr0() & 0x40000000);
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}
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/* Define these functions to allow ehch-hcd to function */
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void flush_dcache_range(unsigned long start, unsigned long stop)
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{
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}
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void invalidate_dcache_range(unsigned long start, unsigned long stop)
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{
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}
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void dcache_enable(void)
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{
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enable_caches();
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}
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void dcache_disable(void)
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{
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disable_caches();
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}
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void icache_enable(void)
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{
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}
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void icache_disable(void)
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{
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}
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int icache_status(void)
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{
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return 1;
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}
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