Bin Meng 05b98ec346 x86: quark: Implement PIRQ routing ... Intel Quark SoC has the same interrupt routing mechanism as the Queensbay platform, only the difference is that PCI devices' INTA/B/C/D are harcoded and cannot be changed freely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>		2015-06-04 02:39:39 -06:00
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include	Makefile: Support include files for .dts files	2014-06-20 11:55:03 -06:00
microcode	x86: Add support for Intel Minnowboard Max	2015-02-06 12:07:39 -07:00
.gitignore	dts: generate multiple device tree blobs	2014-02-19 11:10:05 -05:00
chromebook_link.dts	x86: link: Add PCH driver to support SPI Flash	2015-04-29 18:51:50 -06:00
chromebox_panther.dts	x86: Add support for panther (Asus Chromebox)	2015-04-16 19:27:40 -06:00
crownbay.dts	x86: Refactor PIRQ routing support	2015-06-04 02:39:39 -06:00
galileo.dts	x86: quark: Implement PIRQ routing	2015-06-04 02:39:39 -06:00
Makefile	x86: Support QEMU x86 targets	2015-06-04 02:39:38 -06:00
minnowmax.dts	x86: Enable multi-core init for Minnowboard MAX	2015-04-30 16:13:52 -06:00
qemu-x86.dts	x86: Support QEMU x86 targets	2015-06-04 02:39:38 -06:00
serial.dtsi	x86: Add support for Intel Minnowboard Max	2015-02-06 12:07:39 -07:00
skeleton.dtsi	x86: fdt: Create basic .dtsi file for coreboot	2012-12-06 14:30:42 -08:00