mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
151a030063
Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
104 lines
2.2 KiB
C
104 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <debug_uart.h>
|
|
#include <dm.h>
|
|
#include <hang.h>
|
|
#include <init.h>
|
|
#include <log.h>
|
|
#include <ram.h>
|
|
#include <spl.h>
|
|
#include <version.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch-rockchip/bootrom.h>
|
|
#include <linux/bitops.h>
|
|
#include <linux/kconfig.h>
|
|
|
|
#if CONFIG_IS_ENABLED(BANNER_PRINT)
|
|
#include <timestamp.h>
|
|
#endif
|
|
|
|
#define TIMER_LOAD_COUNT_L 0x00
|
|
#define TIMER_LOAD_COUNT_H 0x04
|
|
#define TIMER_CONTROL_REG 0x10
|
|
#define TIMER_EN 0x1
|
|
#define TIMER_FMODE BIT(0)
|
|
#define TIMER_RMODE BIT(1)
|
|
|
|
__weak void rockchip_stimer_init(void)
|
|
{
|
|
#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
|
|
/* If Timer already enabled, don't re-init it */
|
|
u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
|
|
|
|
if (reg & TIMER_EN)
|
|
return;
|
|
|
|
#ifndef CONFIG_ARM64
|
|
asm volatile("mcr p15, 0, %0, c14, c0, 0"
|
|
: : "r"(CONFIG_COUNTER_FREQUENCY));
|
|
#endif
|
|
|
|
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
|
|
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
|
|
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
|
|
writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
|
|
TIMER_CONTROL_REG);
|
|
#endif
|
|
}
|
|
|
|
void board_init_f(ulong dummy)
|
|
{
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
|
|
/*
|
|
* Debug UART can be used from here if required:
|
|
*
|
|
* debug_uart_init();
|
|
* printch('a');
|
|
* printhex8(0x1234);
|
|
* printascii("string");
|
|
*/
|
|
debug_uart_init();
|
|
#ifdef CONFIG_TPL_BANNER_PRINT
|
|
printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
|
|
U_BOOT_TIME ")\n");
|
|
#endif
|
|
#endif
|
|
ret = spl_early_init();
|
|
if (ret) {
|
|
debug("spl_early_init() failed: %d\n", ret);
|
|
hang();
|
|
}
|
|
|
|
/* Init secure timer */
|
|
rockchip_stimer_init();
|
|
|
|
/* Init ARM arch timer */
|
|
if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
|
|
timer_init();
|
|
|
|
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
|
|
if (ret) {
|
|
printf("DRAM init failed: %d\n", ret);
|
|
return;
|
|
}
|
|
}
|
|
|
|
int board_return_to_bootrom(struct spl_image_info *spl_image,
|
|
struct spl_boot_device *bootdev)
|
|
{
|
|
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
|
|
|
|
return 0;
|
|
}
|
|
|
|
u32 spl_boot_device(void)
|
|
{
|
|
return BOOT_DEVICE_BOOTROM;
|
|
}
|