mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
313 lines
9.2 KiB
C
313 lines
9.2 KiB
C
/*
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* (C) Copyright 2010
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* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
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*
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* Configuation settings for the TOP9000 CPU module with AT91SAM9XE.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* top9000 with at91sam9xe256 or at91sam9xe512
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*
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* Initial Bootloader is in embedded flash.
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* Vital Product Data, U-Boot Environment are in I2C-EEPROM.
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* U-Boot is in embedded flash, a backup U-Boot can be in NAND flash.
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* kernel and file system are either in NAND flash or on a micro SD card.
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* NAND flash is optional.
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* I2C EEPROM is never optional.
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* SPI FRAM is optional.
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* SPI ENC28J60 is optional.
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* 16 or 32 bit wide SDRAM.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Warning: changing CONFIG_SYS_TEXT_BASE requires
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* adapting the initial boot program.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x20000000 /* start of SDRAM */
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/* Command line configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_SETGETDCR
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#undef CONFIG_CMD_XIMG
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#define CONFIG_CMD_ASKENV
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_PROMPT "TOP9000> "
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_CACHE
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz xtal */
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#define CONFIG_SYS_HZ 1000
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/* SoC */
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#define CONFIG_ARM926EJS /* ARM926EJS Core */
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#define CONFIG_AT91FAMILY /* it's a member of AT91 */
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#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 based SoC */
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#define CONFIG_AT91SAM9XE
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/* Misc CPU related */
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#define CONFIG_AT91_LEGACY
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_AT91RESET_EXTRST /* assert external reset */
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/* general purpose I/O */
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#define CONFIG_AT91_GPIO
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#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART3 /* USART 3 is DBGU !!! */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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/* SD/MMC card */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_GENERIC_ATMEL_MCI
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#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9
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#define CONFIG_CMD_MMC
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/* Ethernet */
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#define CONFIG_MACB
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#define CONFIG_SYS_PHY_ID 1
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#define CONFIG_RMII
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#define CONFIG_NET_MULTI
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#define CONFIG_NET_RETRY_COUNT 20
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/* real time clock */
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#define CONFIG_RTC_AT91SAM9_RTT
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#define CONFIG_CMD_DATE
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#if defined(CONFIG_AT91SAM9XE)
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/*
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* NOR flash - use embedded flash of SAM9XE256/512
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* U-Boot will not fit into 128K !
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* 2010.09 will not fit into 256K with all options enabled !
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*
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* Layout:
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* 16kB 1st Bootloader
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* Rest U-Boot
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* the first sector (16kB) of EFLASH cannot be unprotected
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* with u-boot commands
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*/
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# define CONFIG_AT91_EFLASH
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# define CONFIG_SYS_FLASH_BASE 0x200000
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# define CONFIG_SYS_MAX_FLASH_SECT 32
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# define CONFIG_SYS_MAX_FLASH_BANKS 1
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# define CONFIG_SYS_FLASH_PROTECTION
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# define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */
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#endif
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/* SPI */
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#define CONFIG_ATMEL_SPI
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#define CONFIG_CMD_SPI
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/* RAMTRON FRAM */
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#define CONFIG_CMD_SF
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#define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */
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#define FRAM_SPI_BUS 0
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#define FRAM_CS_NUM 0
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#define CONFIG_SPI_FLASH /* RAMTRON FRAM on SPI bus */
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#define CONFIG_SPI_FRAM_RAMTRON
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#define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20"
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/* Microchip ENC28J60 (second LAN) */
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#if defined(CONFIG_EVAL9000)
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# define CONFIG_ENC28J60
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# define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */
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# define ENC_SPI_BUS 1
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# define ENC_CS_NUM 0
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# define ENC_SPI_CLOCK 1000000
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#endif /* CONFIG_EVAL9000 */
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/*
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* SDRAM: 1 bank, min 32, max 128 MB
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* Initialized before u-boot gets started.
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x21e00000
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#define CONFIG_SYS_LOAD_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 0x01000000)
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/*
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* Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above
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* that address while providing maximum stack area below.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR \
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(0x00300000 + 0x4000 - GENERATED_GBL_DATA_SIZE)
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/*
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* NAND flash: 256 MB (optional)
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*
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* Layout:
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* 640kB: u-boot (includes space for spare sectors, handled by
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* initial loader)
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* 2MB: kernel
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* rest: file system
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*/
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
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#define CONFIG_CMD_NAND
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE
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#define CONFIG_CMD_USB
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/* I2C support must always be enabled */
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#define CONFIG_SOFT_I2C
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_I2C_MULTI_BUS
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#define I2C0_PORT AT91_PIO_PORTA
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#define SDA0_PIN 23
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#define SCL0_PIN 24
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#define I2C1_PORT AT91_PIO_PORTB
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#define SDA1_PIN 12
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#define SCL1_PIN 13
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#define I2C_SOFT_DECLARATIONS void iic_init(void);\
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int iic_read(void);\
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void iic_sda(int);\
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void iic_scl(int);
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#define I2C_ACTIVE
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#define I2C_TRISTATE
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#define I2C_INIT iic_init()
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#define I2C_READ iic_read()
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#define I2C_SDA(bit) iic_sda(bit)
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#define I2C_SCL(bit) iic_scl(bit)
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#define I2C_DELAY udelay(3)
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/* EEPROM configuration */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_EEPROM_SIZE 0x2000
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
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/* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */
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/* ENV is always in I2C-EEPROM */
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#define CONFIG_ENV_IS_IN_EEPROM
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#define CONFIG_ENV_OFFSET 0x1000
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#define CONFIG_ENV_SIZE 0x0f00
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/* VPD settings */
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#define CONFIG_SYS_I2C_FACT_ADDR 0x57
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#define CONFIG_SYS_FACT_OFFSET 0x1F00
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#define CONFIG_SYS_FACT_SIZE 0x0100
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/* later: #define CONFIG_MISC_INIT_R */
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/* define the next only if you want to allow users to enter VPD data */
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#define CONFIG_SYS_FACT_ENTRY
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#ifndef __ASSEMBLY__
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extern void read_factory_r(void);
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#endif
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/*
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* Only interrupt autoboot if <space> is pressed. Otherwise, garbage
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* data on the serial line may interrupt the boot sequence.
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*/
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_AUTOBOOT
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT \
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"Press SPACE to abort autoboot in %d seconds\n", bootdelay
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#define CONFIG_AUTOBOOT_DELAY_STR "d"
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#define CONFIG_AUTOBOOT_STOP_STR " "
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/*
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* add filesystem commands if we have at least 1 storage
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* media with filesystem
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*/
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#if defined(CONFIG_NAND_ATMEL) \
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|| defined(CONFIG_USB_ATMEL) \
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|| defined(CONFIG_MMC)
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# define CONFIG_DOS_PARTITION
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# define CONFIG_CMD_FAT
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# define CONFIG_CMD_EXT2
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/* later: #define CONFIG_CMD_JFFS2 */
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#endif
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/* add NET commands if we have at least 1 LAN */
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#if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60)
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# define CONFIG_CMD_PING
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# define CONFIG_CMD_DHCP
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# define CONFIG_CMD_MII
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/* is this really needed ? */
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# define CONFIG_RESET_PHY_R
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/* BOOTP options */
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# define CONFIG_BOOTP_BOOTFILESIZE
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# define CONFIG_BOOTP_BOOTPATH
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# define CONFIG_BOOTP_GATEWAY
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# define CONFIG_BOOTP_HOSTNAME
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#endif
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/* linux in NAND flash */
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#define CONFIG_BOOTCOUNT_LIMIT 1
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#define CONFIG_BOOTCOMMAND \
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"nand read 0x21000000 0xA0000 0x200000; bootm"
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 " \
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"root=/dev/mtdblock2 " \
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"mtdparts=atmel_nand:" \
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"640k(uboot)ro," \
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"2M(linux)," \
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"16M(root)," \
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"-(rest) " \
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"rw "\
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"rootfstype=jffs2"
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#define CONFIG_STACKSIZE (32*1024)
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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