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4ab38f6822
When M33 is LPAV owner in dual boot, DDR, PCC5, CGC2 won't be reset during APD reset. So no need to init DDR again after reboot, but need to reconfigure the PLL4 PFD/PFDDIV/LPAV NIC etc, because kernel may change or disable some of them. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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arm | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
powerpc | ||
riscv | ||
sandbox | ||
sh | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig | ||
u-boot-elf.lds |