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4a5d8898bc
The mips32 & mips64 cache initialization code differs only in that the mips32 code supports reading the cache size from coprocessor 0 registers at runtime. Move the more developed mips32 version to a common arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in order to reduce duplication. The temporary registers used are shuffled slightly in order to work for both mips32 & mips64 builds. The RA register is defined differently to suit mips32 & mips64, but will be removed by a later commit in the series after further cleanup. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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| .. | ||
| ashldi3.c | ||
| ashrdi3.c | ||
| bootm.c | ||
| cache.c | ||
| cache_init.S | ||
| io.c | ||
| libgcc.h | ||
| lshrdi3.c | ||
| Makefile | ||