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94e3c8c4fd
Currently only normal hashing is supported using hardware acceleration. Added support for progressive hashing using hardware. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
34 lines
634 B
C
34 lines
634 B
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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*/
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#ifndef _SHA_H
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#define _SHA_H
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#include <fsl_sec.h>
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#include <hash.h>
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#include "jr.h"
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/* We support at most 32 Scatter/Gather Entries.*/
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#define MAX_SG_32 32
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/*
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* Hash context contains the following fields
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* @sha_desc: Sha Descriptor
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* @sg_num: number of entries in sg table
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* @len: total length of buffer
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* @sg_tbl: sg entry table
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* @hash: index to the hash calculated
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*/
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struct sha_ctx {
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uint32_t sha_desc[64];
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uint32_t sg_num;
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uint32_t len;
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struct sg_entry sg_tbl[MAX_SG_32];
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u8 hash[HASH_MAX_DIGEST_SIZE];
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};
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#endif
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