mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 02:08:38 +00:00
d60a2099a2
The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
23 lines
382 B
C
23 lines
382 B
C
/*
|
|
* Copyright 2014 Freescale Semiconductor, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*
|
|
*/
|
|
|
|
#ifndef __ASM_ARCH_LS102XA_CLOCK_H_
|
|
#define __ASM_ARCH_LS102XA_CLOCK_H_
|
|
|
|
#include <common.h>
|
|
|
|
enum mxc_clock {
|
|
MXC_ARM_CLK = 0,
|
|
MXC_UART_CLK,
|
|
MXC_ESDHC_CLK,
|
|
MXC_I2C_CLK,
|
|
MXC_DSPI_CLK,
|
|
};
|
|
|
|
unsigned int mxc_get_clock(enum mxc_clock clk);
|
|
|
|
#endif /* __ASM_ARCH_LS102XA_CLOCK_H_ */
|