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f517afd5df
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface specified in <asm/gpio.h> . The driver has support for both manipulating GPIO pins as well as automatically configuring the pin multiplexor registers to set the pin function to GPIO. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
74 lines
2.2 KiB
C
74 lines
2.2 KiB
C
/*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _GPIO_DEFS_H_
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#define _GPIO_DEFS_H_
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#ifndef CONFIG_SOC_DA8XX
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#define DAVINCI_GPIO_BINTEN 0x01C67008
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#define DAVINCI_GPIO_BANK01 0x01C67010
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#define DAVINCI_GPIO_BANK23 0x01C67038
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#define DAVINCI_GPIO_BANK45 0x01C67060
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#define DAVINCI_GPIO_BANK67 0x01C67088
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#else /* CONFIG_SOC_DA8XX */
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#define DAVINCI_GPIO_BINTEN 0x01E26008
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#define DAVINCI_GPIO_BANK01 0x01E26010
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#define DAVINCI_GPIO_BANK23 0x01E26038
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#define DAVINCI_GPIO_BANK45 0x01E26060
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#define DAVINCI_GPIO_BANK67 0x01E26088
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#endif /* CONFIG_SOC_DA8XX */
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struct davinci_gpio {
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unsigned int dir;
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unsigned int out_data;
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unsigned int set_data;
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unsigned int clr_data;
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unsigned int in_data;
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unsigned int set_rising;
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unsigned int clr_rising;
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unsigned int set_falling;
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unsigned int clr_falling;
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unsigned int intstat;
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};
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struct davinci_gpio_bank {
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int num_gpio;
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unsigned int irq_num;
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unsigned int irq_mask;
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unsigned long *in_use;
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unsigned long base;
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};
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#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)
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#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23)
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#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45)
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#define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67)
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#define gpio_status() gpio_info()
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#define GPIO_NAME_SIZE 20
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#define MAX_NUM_GPIOS 144
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#define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5))
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#define GPIO_BIT(gp) ((gp) & 0x1F)
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void gpio_info(void);
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#endif
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