York Sun bcb6c2bb84 Enabled support for Rev 1.3 SPD for DDR2 DIMMs ... SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3. The difference has ben examined and the code is compatible. Speed bins is not verified on hardware for CL7 at this moment. This patch also enables SPD Rev 1.x where x is up to "F". According to SPD spec, the lower nibble is optionally used to determine which additinal bytes or attribute bits have been defined. Software can safely use defaults. However, the upper nibble should always be checked. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2010-05-12 04:54:30 -05:00
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ddr	Enabled support for Rev 1.3 SPD for DDR2 DIMMs	2010-05-12 04:54:30 -05:00
cpu.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
fdt.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
Makefile	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
pci_cfg.c	85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabled	2010-05-12 04:53:51 -05:00