u-boot/arch/riscv
Chanho Park 1c55d62fb9 riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback
Since the Patch 55171aedda, VisionFive2 booting has been broken [1].
VisionFive2 board requires to enable CONFIG_TIMER_EARLY but booting went
to panic from initr_dm_devices due to lack of a timer device.

- Error logs
initcall sequence 00000000fffd8d38 failed at call 00000000402185e4
(err=-19)

Thus, we need to move riscv_cpu_probe function in order to register
the timer earlier than initr_dm_devices.

Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev>
Tested-by: Roland Ruckerbauer <mail@ruabmbua.dev>
2023-08-22 08:07:54 -06:00
..
cpu riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback 2023-08-22 08:07:54 -06:00
dts riscv: dts: starfive: Enable pcie0 dts node 2023-08-10 10:58:01 +08:00
include/asm cmd/sbi: display new extensions 2023-08-10 10:57:56 +08:00
lib riscv: Rename SiFive CLINT to RISC-V ALINT 2023-07-12 13:21:40 +08:00
config.mk riscv: Support CONFIG_REMAKE_ELF 2023-04-20 20:45:08 +08:00
Kconfig riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE 2023-08-10 10:58:12 +08:00
Makefile riscv: support building double-float modules 2022-10-20 15:22:21 +08:00