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https://github.com/AsahiLinux/u-boot
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b3521f2e49
At present there are DEBUG options spread around the place. If you enable one and not another you can end up with an emulator that does not work, since each file can have a different view of what the registers look like. To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps everything consistent. Signed-off-by: Simon Glass <sjg@chromium.org>
1144 lines
31 KiB
C
1144 lines
31 KiB
C
/****************************************************************************
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*
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* Realmode X86 Emulator Library
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*
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* Copyright (C) 1991-2004 SciTech Software, Inc.
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* Copyright (C) David Mosberger-Tang
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* Copyright (C) 1999 Egbert Eich
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*
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* ========================================================================
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*
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* Permission to use, copy, modify, distribute, and sell this software and
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* its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of the authors not be used
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* in advertising or publicity pertaining to distribution of the software
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* without specific, written prior permission. The authors makes no
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* representations about the suitability of this software for any purpose.
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* It is provided "as is" without express or implied warranty.
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*
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* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
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* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* ========================================================================
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*
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* Language: ANSI C
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* Environment: Any
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* Developer: Kendall Bennett
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*
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* Description: This file includes subroutines which are related to
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* instruction decoding and accessess of immediate data via IP. etc.
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*
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****************************************************************************/
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#include <common.h>
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#include "x86emu/x86emui.h"
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/*----------------------------- Implementation ----------------------------*/
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/****************************************************************************
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REMARKS:
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Handles any pending asychronous interrupts.
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****************************************************************************/
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static void x86emu_intr_handle(void)
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{
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u8 intno;
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if (M.x86.intr & INTR_SYNCH) {
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intno = M.x86.intno;
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if (_X86EMU_intrTab[intno]) {
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(*_X86EMU_intrTab[intno])(intno);
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} else {
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push_word((u16)M.x86.R_FLG);
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CLEAR_FLAG(F_IF);
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CLEAR_FLAG(F_TF);
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push_word(M.x86.R_CS);
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M.x86.R_CS = mem_access_word(intno * 4 + 2);
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push_word(M.x86.R_IP);
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M.x86.R_IP = mem_access_word(intno * 4);
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M.x86.intr = 0;
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}
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}
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}
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/****************************************************************************
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PARAMETERS:
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intrnum - Interrupt number to raise
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REMARKS:
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Raise the specified interrupt to be handled before the execution of the
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next instruction.
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****************************************************************************/
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void x86emu_intr_raise(
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u8 intrnum)
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{
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M.x86.intno = intrnum;
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M.x86.intr |= INTR_SYNCH;
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}
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/****************************************************************************
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REMARKS:
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Main execution loop for the emulator. We return from here when the system
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halts, which is normally caused by a stack fault when we return from the
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original real mode call.
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****************************************************************************/
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void X86EMU_exec(void)
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{
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u8 op1;
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M.x86.intr = 0;
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DB(x86emu_end_instr();)
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for (;;) {
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DB( if (CHECK_IP_FETCH())
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x86emu_check_ip_access();)
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/* If debugging, save the IP and CS values. */
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SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
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INC_DECODED_INST_LEN(1);
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if (M.x86.intr) {
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if (M.x86.intr & INTR_HALTED) {
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DB( if (M.x86.R_SP != 0) {
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printk("halted\n");
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X86EMU_trace_regs();
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}
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else {
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if (M.x86.debug)
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printk("Service completed successfully\n");
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})
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return;
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}
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if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
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!ACCESS_FLAG(F_IF)) {
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x86emu_intr_handle();
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}
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}
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op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
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(*x86emu_optab[op1])(op1);
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if (M.x86.debug & DEBUG_EXIT) {
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M.x86.debug &= ~DEBUG_EXIT;
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return;
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}
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}
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}
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/****************************************************************************
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REMARKS:
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Halts the system by setting the halted system flag.
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****************************************************************************/
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void X86EMU_halt_sys(void)
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{
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M.x86.intr |= INTR_HALTED;
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}
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/****************************************************************************
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PARAMETERS:
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mod - Mod value from decoded byte
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regh - Reg h value from decoded byte
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regl - Reg l value from decoded byte
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REMARKS:
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Raise the specified interrupt to be handled before the execution of the
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next instruction.
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NOTE: Do not inline this function, as (*sys_rdb) is already inline!
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****************************************************************************/
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void fetch_decode_modrm(
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int *mod,
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int *regh,
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int *regl)
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{
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int fetched;
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DB( if (CHECK_IP_FETCH())
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x86emu_check_ip_access();)
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fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
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INC_DECODED_INST_LEN(1);
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*mod = (fetched >> 6) & 0x03;
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*regh = (fetched >> 3) & 0x07;
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*regl = (fetched >> 0) & 0x07;
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}
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/****************************************************************************
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RETURNS:
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Immediate byte value read from instruction queue
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REMARKS:
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This function returns the immediate byte from the instruction queue, and
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moves the instruction pointer to the next value.
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NOTE: Do not inline this function, as (*sys_rdb) is already inline!
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****************************************************************************/
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u8 fetch_byte_imm(void)
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{
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u8 fetched;
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DB( if (CHECK_IP_FETCH())
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x86emu_check_ip_access();)
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fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
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INC_DECODED_INST_LEN(1);
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return fetched;
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}
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/****************************************************************************
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RETURNS:
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Immediate word value read from instruction queue
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REMARKS:
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This function returns the immediate byte from the instruction queue, and
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moves the instruction pointer to the next value.
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NOTE: Do not inline this function, as (*sys_rdw) is already inline!
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****************************************************************************/
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u16 fetch_word_imm(void)
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{
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u16 fetched;
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DB( if (CHECK_IP_FETCH())
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x86emu_check_ip_access();)
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fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
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M.x86.R_IP += 2;
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INC_DECODED_INST_LEN(2);
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return fetched;
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}
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/****************************************************************************
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RETURNS:
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Immediate lone value read from instruction queue
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REMARKS:
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This function returns the immediate byte from the instruction queue, and
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moves the instruction pointer to the next value.
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NOTE: Do not inline this function, as (*sys_rdw) is already inline!
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****************************************************************************/
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u32 fetch_long_imm(void)
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{
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u32 fetched;
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DB( if (CHECK_IP_FETCH())
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x86emu_check_ip_access();)
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fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
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M.x86.R_IP += 4;
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INC_DECODED_INST_LEN(4);
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return fetched;
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}
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/****************************************************************************
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RETURNS:
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Value of the default data segment
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REMARKS:
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Inline function that returns the default data segment for the current
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instruction.
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On the x86 processor, the default segment is not always DS if there is
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no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
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addresses relative to SS (ie: on the stack). So, at the minimum, all
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decodings of addressing modes would have to set/clear a bit describing
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whether the access is relative to DS or SS. That is the function of the
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cpu-state-varible M.x86.mode. There are several potential states:
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repe prefix seen (handled elsewhere)
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repne prefix seen (ditto)
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cs segment override
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ds segment override
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es segment override
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fs segment override
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gs segment override
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ss segment override
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ds/ss select (in absense of override)
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Each of the above 7 items are handled with a bit in the mode field.
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****************************************************************************/
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_INLINE u32 get_data_segment(void)
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{
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#define GET_SEGMENT(segment)
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switch (M.x86.mode & SYSMODE_SEGMASK) {
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case 0: /* default case: use ds register */
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case SYSMODE_SEGOVR_DS:
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case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
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return M.x86.R_DS;
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case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
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return M.x86.R_SS;
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case SYSMODE_SEGOVR_CS:
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case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
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return M.x86.R_CS;
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case SYSMODE_SEGOVR_ES:
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case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
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return M.x86.R_ES;
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case SYSMODE_SEGOVR_FS:
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case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
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return M.x86.R_FS;
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case SYSMODE_SEGOVR_GS:
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case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
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return M.x86.R_GS;
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case SYSMODE_SEGOVR_SS:
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case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
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return M.x86.R_SS;
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default:
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#ifdef DEBUG
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printk("error: should not happen: multiple overrides.\n");
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#endif
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HALT_SYS();
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return 0;
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}
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}
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/****************************************************************************
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PARAMETERS:
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offset - Offset to load data from
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RETURNS:
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Byte value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u8 fetch_data_byte(
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access((u16)get_data_segment(), offset);
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#endif
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return (*sys_rdb)((get_data_segment() << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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offset - Offset to load data from
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RETURNS:
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Word value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u16 fetch_data_word(
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access((u16)get_data_segment(), offset);
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#endif
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return (*sys_rdw)((get_data_segment() << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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offset - Offset to load data from
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RETURNS:
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Long value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u32 fetch_data_long(
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access((u16)get_data_segment(), offset);
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#endif
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return (*sys_rdl)((get_data_segment() << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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segment - Segment to load data from
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offset - Offset to load data from
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RETURNS:
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Byte value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u8 fetch_data_byte_abs(
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uint segment,
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access(segment, offset);
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#endif
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return (*sys_rdb)(((u32)segment << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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segment - Segment to load data from
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offset - Offset to load data from
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RETURNS:
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Word value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u16 fetch_data_word_abs(
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uint segment,
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access(segment, offset);
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#endif
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return (*sys_rdw)(((u32)segment << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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segment - Segment to load data from
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offset - Offset to load data from
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RETURNS:
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Long value read from the absolute memory location.
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NOTE: Do not inline this function as (*sys_rdX) is already inline!
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****************************************************************************/
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u32 fetch_data_long_abs(
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uint segment,
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uint offset)
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{
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access(segment, offset);
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#endif
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return (*sys_rdl)(((u32)segment << 4) + offset);
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}
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/****************************************************************************
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PARAMETERS:
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offset - Offset to store data at
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val - Value to store
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REMARKS:
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Writes a word value to an segmented memory location. The segment used is
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the current 'default' segment, which may have been overridden.
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NOTE: Do not inline this function as (*sys_wrX) is already inline!
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****************************************************************************/
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void store_data_byte(
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uint offset,
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u8 val)
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{
|
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#ifdef CONFIG_X86EMU_DEBUG
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if (CHECK_DATA_ACCESS())
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x86emu_check_data_access((u16)get_data_segment(), offset);
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#endif
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(*sys_wrb)((get_data_segment() << 4) + offset, val);
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}
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|
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/****************************************************************************
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|
PARAMETERS:
|
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offset - Offset to store data at
|
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val - Value to store
|
|
|
|
REMARKS:
|
|
Writes a word value to an segmented memory location. The segment used is
|
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the current 'default' segment, which may have been overridden.
|
|
|
|
NOTE: Do not inline this function as (*sys_wrX) is already inline!
|
|
****************************************************************************/
|
|
void store_data_word(
|
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uint offset,
|
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u16 val)
|
|
{
|
|
#ifdef CONFIG_X86EMU_DEBUG
|
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if (CHECK_DATA_ACCESS())
|
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x86emu_check_data_access((u16)get_data_segment(), offset);
|
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#endif
|
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(*sys_wrw)((get_data_segment() << 4) + offset, val);
|
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}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
offset - Offset to store data at
|
|
val - Value to store
|
|
|
|
REMARKS:
|
|
Writes a long value to an segmented memory location. The segment used is
|
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the current 'default' segment, which may have been overridden.
|
|
|
|
NOTE: Do not inline this function as (*sys_wrX) is already inline!
|
|
****************************************************************************/
|
|
void store_data_long(
|
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uint offset,
|
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u32 val)
|
|
{
|
|
#ifdef CONFIG_X86EMU_DEBUG
|
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if (CHECK_DATA_ACCESS())
|
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x86emu_check_data_access((u16)get_data_segment(), offset);
|
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#endif
|
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(*sys_wrl)((get_data_segment() << 4) + offset, val);
|
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}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
segment - Segment to store data at
|
|
offset - Offset to store data at
|
|
val - Value to store
|
|
|
|
REMARKS:
|
|
Writes a byte value to an absolute memory location.
|
|
|
|
NOTE: Do not inline this function as (*sys_wrX) is already inline!
|
|
****************************************************************************/
|
|
void store_data_byte_abs(
|
|
uint segment,
|
|
uint offset,
|
|
u8 val)
|
|
{
|
|
#ifdef CONFIG_X86EMU_DEBUG
|
|
if (CHECK_DATA_ACCESS())
|
|
x86emu_check_data_access(segment, offset);
|
|
#endif
|
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(*sys_wrb)(((u32)segment << 4) + offset, val);
|
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}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
segment - Segment to store data at
|
|
offset - Offset to store data at
|
|
val - Value to store
|
|
|
|
REMARKS:
|
|
Writes a word value to an absolute memory location.
|
|
|
|
NOTE: Do not inline this function as (*sys_wrX) is already inline!
|
|
****************************************************************************/
|
|
void store_data_word_abs(
|
|
uint segment,
|
|
uint offset,
|
|
u16 val)
|
|
{
|
|
#ifdef CONFIG_X86EMU_DEBUG
|
|
if (CHECK_DATA_ACCESS())
|
|
x86emu_check_data_access(segment, offset);
|
|
#endif
|
|
(*sys_wrw)(((u32)segment << 4) + offset, val);
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
segment - Segment to store data at
|
|
offset - Offset to store data at
|
|
val - Value to store
|
|
|
|
REMARKS:
|
|
Writes a long value to an absolute memory location.
|
|
|
|
NOTE: Do not inline this function as (*sys_wrX) is already inline!
|
|
****************************************************************************/
|
|
void store_data_long_abs(
|
|
uint segment,
|
|
uint offset,
|
|
u32 val)
|
|
{
|
|
#ifdef CONFIG_X86EMU_DEBUG
|
|
if (CHECK_DATA_ACCESS())
|
|
x86emu_check_data_access(segment, offset);
|
|
#endif
|
|
(*sys_wrl)(((u32)segment << 4) + offset, val);
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
reg - Register to decode
|
|
|
|
RETURNS:
|
|
Pointer to the appropriate register
|
|
|
|
REMARKS:
|
|
Return a pointer to the register given by the R/RM field of the
|
|
modrm byte, for byte operands. Also enables the decoding of instructions.
|
|
****************************************************************************/
|
|
u8* decode_rm_byte_register(
|
|
int reg)
|
|
{
|
|
switch (reg) {
|
|
case 0:
|
|
DECODE_PRINTF("AL");
|
|
return &M.x86.R_AL;
|
|
case 1:
|
|
DECODE_PRINTF("CL");
|
|
return &M.x86.R_CL;
|
|
case 2:
|
|
DECODE_PRINTF("DL");
|
|
return &M.x86.R_DL;
|
|
case 3:
|
|
DECODE_PRINTF("BL");
|
|
return &M.x86.R_BL;
|
|
case 4:
|
|
DECODE_PRINTF("AH");
|
|
return &M.x86.R_AH;
|
|
case 5:
|
|
DECODE_PRINTF("CH");
|
|
return &M.x86.R_CH;
|
|
case 6:
|
|
DECODE_PRINTF("DH");
|
|
return &M.x86.R_DH;
|
|
case 7:
|
|
DECODE_PRINTF("BH");
|
|
return &M.x86.R_BH;
|
|
}
|
|
HALT_SYS();
|
|
return NULL; /* NOT REACHED OR REACHED ON ERROR */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
reg - Register to decode
|
|
|
|
RETURNS:
|
|
Pointer to the appropriate register
|
|
|
|
REMARKS:
|
|
Return a pointer to the register given by the R/RM field of the
|
|
modrm byte, for word operands. Also enables the decoding of instructions.
|
|
****************************************************************************/
|
|
u16* decode_rm_word_register(
|
|
int reg)
|
|
{
|
|
switch (reg) {
|
|
case 0:
|
|
DECODE_PRINTF("AX");
|
|
return &M.x86.R_AX;
|
|
case 1:
|
|
DECODE_PRINTF("CX");
|
|
return &M.x86.R_CX;
|
|
case 2:
|
|
DECODE_PRINTF("DX");
|
|
return &M.x86.R_DX;
|
|
case 3:
|
|
DECODE_PRINTF("BX");
|
|
return &M.x86.R_BX;
|
|
case 4:
|
|
DECODE_PRINTF("SP");
|
|
return &M.x86.R_SP;
|
|
case 5:
|
|
DECODE_PRINTF("BP");
|
|
return &M.x86.R_BP;
|
|
case 6:
|
|
DECODE_PRINTF("SI");
|
|
return &M.x86.R_SI;
|
|
case 7:
|
|
DECODE_PRINTF("DI");
|
|
return &M.x86.R_DI;
|
|
}
|
|
HALT_SYS();
|
|
return NULL; /* NOTREACHED OR REACHED ON ERROR */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
reg - Register to decode
|
|
|
|
RETURNS:
|
|
Pointer to the appropriate register
|
|
|
|
REMARKS:
|
|
Return a pointer to the register given by the R/RM field of the
|
|
modrm byte, for dword operands. Also enables the decoding of instructions.
|
|
****************************************************************************/
|
|
u32* decode_rm_long_register(
|
|
int reg)
|
|
{
|
|
switch (reg) {
|
|
case 0:
|
|
DECODE_PRINTF("EAX");
|
|
return &M.x86.R_EAX;
|
|
case 1:
|
|
DECODE_PRINTF("ECX");
|
|
return &M.x86.R_ECX;
|
|
case 2:
|
|
DECODE_PRINTF("EDX");
|
|
return &M.x86.R_EDX;
|
|
case 3:
|
|
DECODE_PRINTF("EBX");
|
|
return &M.x86.R_EBX;
|
|
case 4:
|
|
DECODE_PRINTF("ESP");
|
|
return &M.x86.R_ESP;
|
|
case 5:
|
|
DECODE_PRINTF("EBP");
|
|
return &M.x86.R_EBP;
|
|
case 6:
|
|
DECODE_PRINTF("ESI");
|
|
return &M.x86.R_ESI;
|
|
case 7:
|
|
DECODE_PRINTF("EDI");
|
|
return &M.x86.R_EDI;
|
|
}
|
|
HALT_SYS();
|
|
return NULL; /* NOTREACHED OR REACHED ON ERROR */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
reg - Register to decode
|
|
|
|
RETURNS:
|
|
Pointer to the appropriate register
|
|
|
|
REMARKS:
|
|
Return a pointer to the register given by the R/RM field of the
|
|
modrm byte, for word operands, modified from above for the weirdo
|
|
special case of segreg operands. Also enables the decoding of instructions.
|
|
****************************************************************************/
|
|
u16* decode_rm_seg_register(
|
|
int reg)
|
|
{
|
|
switch (reg) {
|
|
case 0:
|
|
DECODE_PRINTF("ES");
|
|
return &M.x86.R_ES;
|
|
case 1:
|
|
DECODE_PRINTF("CS");
|
|
return &M.x86.R_CS;
|
|
case 2:
|
|
DECODE_PRINTF("SS");
|
|
return &M.x86.R_SS;
|
|
case 3:
|
|
DECODE_PRINTF("DS");
|
|
return &M.x86.R_DS;
|
|
case 4:
|
|
DECODE_PRINTF("FS");
|
|
return &M.x86.R_FS;
|
|
case 5:
|
|
DECODE_PRINTF("GS");
|
|
return &M.x86.R_GS;
|
|
case 6:
|
|
case 7:
|
|
DECODE_PRINTF("ILLEGAL SEGREG");
|
|
break;
|
|
}
|
|
HALT_SYS();
|
|
return NULL; /* NOT REACHED OR REACHED ON ERROR */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
scale - scale value of SIB byte
|
|
index - index value of SIB byte
|
|
|
|
RETURNS:
|
|
Value of scale * index
|
|
|
|
REMARKS:
|
|
Decodes scale/index of SIB byte and returns relevant offset part of
|
|
effective address.
|
|
****************************************************************************/
|
|
unsigned decode_sib_si(
|
|
int scale,
|
|
int index)
|
|
{
|
|
scale = 1 << scale;
|
|
if (scale > 1) {
|
|
DECODE_PRINTF2("[%d*", scale);
|
|
} else {
|
|
DECODE_PRINTF("[");
|
|
}
|
|
switch (index) {
|
|
case 0:
|
|
DECODE_PRINTF("EAX]");
|
|
return M.x86.R_EAX * index;
|
|
case 1:
|
|
DECODE_PRINTF("ECX]");
|
|
return M.x86.R_ECX * index;
|
|
case 2:
|
|
DECODE_PRINTF("EDX]");
|
|
return M.x86.R_EDX * index;
|
|
case 3:
|
|
DECODE_PRINTF("EBX]");
|
|
return M.x86.R_EBX * index;
|
|
case 4:
|
|
DECODE_PRINTF("0]");
|
|
return 0;
|
|
case 5:
|
|
DECODE_PRINTF("EBP]");
|
|
return M.x86.R_EBP * index;
|
|
case 6:
|
|
DECODE_PRINTF("ESI]");
|
|
return M.x86.R_ESI * index;
|
|
case 7:
|
|
DECODE_PRINTF("EDI]");
|
|
return M.x86.R_EDI * index;
|
|
}
|
|
HALT_SYS();
|
|
return 0; /* NOT REACHED OR REACHED ON ERROR */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
mod - MOD value of preceding ModR/M byte
|
|
|
|
RETURNS:
|
|
Offset in memory for the address decoding
|
|
|
|
REMARKS:
|
|
Decodes SIB addressing byte and returns calculated effective address.
|
|
****************************************************************************/
|
|
unsigned decode_sib_address(
|
|
int mod)
|
|
{
|
|
int sib = fetch_byte_imm();
|
|
int ss = (sib >> 6) & 0x03;
|
|
int index = (sib >> 3) & 0x07;
|
|
int base = sib & 0x07;
|
|
int offset = 0;
|
|
int displacement;
|
|
|
|
switch (base) {
|
|
case 0:
|
|
DECODE_PRINTF("[EAX]");
|
|
offset = M.x86.R_EAX;
|
|
break;
|
|
case 1:
|
|
DECODE_PRINTF("[ECX]");
|
|
offset = M.x86.R_ECX;
|
|
break;
|
|
case 2:
|
|
DECODE_PRINTF("[EDX]");
|
|
offset = M.x86.R_EDX;
|
|
break;
|
|
case 3:
|
|
DECODE_PRINTF("[EBX]");
|
|
offset = M.x86.R_EBX;
|
|
break;
|
|
case 4:
|
|
DECODE_PRINTF("[ESP]");
|
|
offset = M.x86.R_ESP;
|
|
break;
|
|
case 5:
|
|
switch (mod) {
|
|
case 0:
|
|
displacement = (s32)fetch_long_imm();
|
|
DECODE_PRINTF2("[%d]", displacement);
|
|
offset = displacement;
|
|
break;
|
|
case 1:
|
|
displacement = (s8)fetch_byte_imm();
|
|
DECODE_PRINTF2("[%d][EBP]", displacement);
|
|
offset = M.x86.R_EBP + displacement;
|
|
break;
|
|
case 2:
|
|
displacement = (s32)fetch_long_imm();
|
|
DECODE_PRINTF2("[%d][EBP]", displacement);
|
|
offset = M.x86.R_EBP + displacement;
|
|
break;
|
|
default:
|
|
HALT_SYS();
|
|
}
|
|
DECODE_PRINTF("[EAX]");
|
|
offset = M.x86.R_EAX;
|
|
break;
|
|
case 6:
|
|
DECODE_PRINTF("[ESI]");
|
|
offset = M.x86.R_ESI;
|
|
break;
|
|
case 7:
|
|
DECODE_PRINTF("[EDI]");
|
|
offset = M.x86.R_EDI;
|
|
break;
|
|
default:
|
|
HALT_SYS();
|
|
}
|
|
offset += decode_sib_si(ss, index);
|
|
return offset;
|
|
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
rm - RM value to decode
|
|
|
|
RETURNS:
|
|
Offset in memory for the address decoding
|
|
|
|
REMARKS:
|
|
Return the offset given by mod=00 addressing. Also enables the
|
|
decoding of instructions.
|
|
|
|
NOTE: The code which specifies the corresponding segment (ds vs ss)
|
|
below in the case of [BP+..]. The assumption here is that at the
|
|
point that this subroutine is called, the bit corresponding to
|
|
SYSMODE_SEG_DS_SS will be zero. After every instruction
|
|
except the segment override instructions, this bit (as well
|
|
as any bits indicating segment overrides) will be clear. So
|
|
if a SS access is needed, set this bit. Otherwise, DS access
|
|
occurs (unless any of the segment override bits are set).
|
|
****************************************************************************/
|
|
unsigned decode_rm00_address(
|
|
int rm)
|
|
{
|
|
unsigned offset;
|
|
|
|
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
|
|
/* 32-bit addressing */
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF("[EAX]");
|
|
return M.x86.R_EAX;
|
|
case 1:
|
|
DECODE_PRINTF("[ECX]");
|
|
return M.x86.R_ECX;
|
|
case 2:
|
|
DECODE_PRINTF("[EDX]");
|
|
return M.x86.R_EDX;
|
|
case 3:
|
|
DECODE_PRINTF("[EBX]");
|
|
return M.x86.R_EBX;
|
|
case 4:
|
|
return decode_sib_address(0);
|
|
case 5:
|
|
offset = fetch_long_imm();
|
|
DECODE_PRINTF2("[%08x]", offset);
|
|
return offset;
|
|
case 6:
|
|
DECODE_PRINTF("[ESI]");
|
|
return M.x86.R_ESI;
|
|
case 7:
|
|
DECODE_PRINTF("[EDI]");
|
|
return M.x86.R_EDI;
|
|
}
|
|
} else {
|
|
/* 16-bit addressing */
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF("[BX+SI]");
|
|
return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
|
|
case 1:
|
|
DECODE_PRINTF("[BX+DI]");
|
|
return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
|
|
case 2:
|
|
DECODE_PRINTF("[BP+SI]");
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
|
|
case 3:
|
|
DECODE_PRINTF("[BP+DI]");
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
|
|
case 4:
|
|
DECODE_PRINTF("[SI]");
|
|
return M.x86.R_SI;
|
|
case 5:
|
|
DECODE_PRINTF("[DI]");
|
|
return M.x86.R_DI;
|
|
case 6:
|
|
offset = fetch_word_imm();
|
|
DECODE_PRINTF2("[%04x]", offset);
|
|
return offset;
|
|
case 7:
|
|
DECODE_PRINTF("[BX]");
|
|
return M.x86.R_BX;
|
|
}
|
|
}
|
|
HALT_SYS();
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
rm - RM value to decode
|
|
|
|
RETURNS:
|
|
Offset in memory for the address decoding
|
|
|
|
REMARKS:
|
|
Return the offset given by mod=01 addressing. Also enables the
|
|
decoding of instructions.
|
|
****************************************************************************/
|
|
unsigned decode_rm01_address(
|
|
int rm)
|
|
{
|
|
int displacement;
|
|
|
|
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
|
|
/* 32-bit addressing */
|
|
if (rm != 4)
|
|
displacement = (s8)fetch_byte_imm();
|
|
else
|
|
displacement = 0;
|
|
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF2("%d[EAX]", displacement);
|
|
return M.x86.R_EAX + displacement;
|
|
case 1:
|
|
DECODE_PRINTF2("%d[ECX]", displacement);
|
|
return M.x86.R_ECX + displacement;
|
|
case 2:
|
|
DECODE_PRINTF2("%d[EDX]", displacement);
|
|
return M.x86.R_EDX + displacement;
|
|
case 3:
|
|
DECODE_PRINTF2("%d[EBX]", displacement);
|
|
return M.x86.R_EBX + displacement;
|
|
case 4: {
|
|
int offset = decode_sib_address(1);
|
|
displacement = (s8)fetch_byte_imm();
|
|
DECODE_PRINTF2("[%d]", displacement);
|
|
return offset + displacement;
|
|
}
|
|
case 5:
|
|
DECODE_PRINTF2("%d[EBP]", displacement);
|
|
return M.x86.R_EBP + displacement;
|
|
case 6:
|
|
DECODE_PRINTF2("%d[ESI]", displacement);
|
|
return M.x86.R_ESI + displacement;
|
|
case 7:
|
|
DECODE_PRINTF2("%d[EDI]", displacement);
|
|
return M.x86.R_EDI + displacement;
|
|
}
|
|
} else {
|
|
/* 16-bit addressing */
|
|
displacement = (s8)fetch_byte_imm();
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF2("%d[BX+SI]", displacement);
|
|
return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
|
|
case 1:
|
|
DECODE_PRINTF2("%d[BX+DI]", displacement);
|
|
return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
|
|
case 2:
|
|
DECODE_PRINTF2("%d[BP+SI]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
|
|
case 3:
|
|
DECODE_PRINTF2("%d[BP+DI]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
|
|
case 4:
|
|
DECODE_PRINTF2("%d[SI]", displacement);
|
|
return (M.x86.R_SI + displacement) & 0xffff;
|
|
case 5:
|
|
DECODE_PRINTF2("%d[DI]", displacement);
|
|
return (M.x86.R_DI + displacement) & 0xffff;
|
|
case 6:
|
|
DECODE_PRINTF2("%d[BP]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + displacement) & 0xffff;
|
|
case 7:
|
|
DECODE_PRINTF2("%d[BX]", displacement);
|
|
return (M.x86.R_BX + displacement) & 0xffff;
|
|
}
|
|
}
|
|
HALT_SYS();
|
|
return 0; /* SHOULD NOT HAPPEN */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
rm - RM value to decode
|
|
|
|
RETURNS:
|
|
Offset in memory for the address decoding
|
|
|
|
REMARKS:
|
|
Return the offset given by mod=10 addressing. Also enables the
|
|
decoding of instructions.
|
|
****************************************************************************/
|
|
unsigned decode_rm10_address(
|
|
int rm)
|
|
{
|
|
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
|
|
int displacement;
|
|
|
|
/* 32-bit addressing */
|
|
if (rm != 4)
|
|
displacement = (s32)fetch_long_imm();
|
|
else
|
|
displacement = 0;
|
|
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF2("%d[EAX]", displacement);
|
|
return M.x86.R_EAX + displacement;
|
|
case 1:
|
|
DECODE_PRINTF2("%d[ECX]", displacement);
|
|
return M.x86.R_ECX + displacement;
|
|
case 2:
|
|
DECODE_PRINTF2("%d[EDX]", displacement);
|
|
return M.x86.R_EDX + displacement;
|
|
case 3:
|
|
DECODE_PRINTF2("%d[EBX]", displacement);
|
|
return M.x86.R_EBX + displacement;
|
|
case 4: {
|
|
int offset = decode_sib_address(2);
|
|
displacement = (s32)fetch_long_imm();
|
|
DECODE_PRINTF2("[%d]", displacement);
|
|
return offset + displacement;
|
|
}
|
|
case 5:
|
|
DECODE_PRINTF2("%d[EBP]", displacement);
|
|
return M.x86.R_EBP + displacement;
|
|
case 6:
|
|
DECODE_PRINTF2("%d[ESI]", displacement);
|
|
return M.x86.R_ESI + displacement;
|
|
case 7:
|
|
DECODE_PRINTF2("%d[EDI]", displacement);
|
|
return M.x86.R_EDI + displacement;
|
|
}
|
|
} else {
|
|
int displacement = (s16)fetch_word_imm();
|
|
|
|
/* 16-bit addressing */
|
|
switch (rm) {
|
|
case 0:
|
|
DECODE_PRINTF2("%d[BX+SI]", displacement);
|
|
return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
|
|
case 1:
|
|
DECODE_PRINTF2("%d[BX+DI]", displacement);
|
|
return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
|
|
case 2:
|
|
DECODE_PRINTF2("%d[BP+SI]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
|
|
case 3:
|
|
DECODE_PRINTF2("%d[BP+DI]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
|
|
case 4:
|
|
DECODE_PRINTF2("%d[SI]", displacement);
|
|
return (M.x86.R_SI + displacement) & 0xffff;
|
|
case 5:
|
|
DECODE_PRINTF2("%d[DI]", displacement);
|
|
return (M.x86.R_DI + displacement) & 0xffff;
|
|
case 6:
|
|
DECODE_PRINTF2("%d[BP]", displacement);
|
|
M.x86.mode |= SYSMODE_SEG_DS_SS;
|
|
return (M.x86.R_BP + displacement) & 0xffff;
|
|
case 7:
|
|
DECODE_PRINTF2("%d[BX]", displacement);
|
|
return (M.x86.R_BX + displacement) & 0xffff;
|
|
}
|
|
}
|
|
HALT_SYS();
|
|
return 0; /* SHOULD NOT HAPPEN */
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
mod - modifier
|
|
rm - RM value to decode
|
|
|
|
RETURNS:
|
|
Offset in memory for the address decoding, multiplexing calls to
|
|
the decode_rmXX_address functions
|
|
|
|
REMARKS:
|
|
Return the offset given by "mod" addressing.
|
|
****************************************************************************/
|
|
|
|
unsigned decode_rmXX_address(int mod, int rm)
|
|
{
|
|
if(mod == 0)
|
|
return decode_rm00_address(rm);
|
|
if(mod == 1)
|
|
return decode_rm01_address(rm);
|
|
return decode_rm10_address(rm);
|
|
}
|