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u-boot/arch/riscv/cpu/jh7110
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Shengyu Qu 47ed15125c riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE 
Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-08-10 10:58:55 +08:00
..
cpu.c riscv: cpu: jh7110: Add support for jh7110 SoC 2023-04-20 16:08:44 +08:00
dram.c riscv: cpu: jh7110: Add support for jh7110 SoC 2023-04-20 16:08:44 +08:00
Kconfig riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE 2023-08-10 10:58:55 +08:00
Makefile riscv: cpu: jh7110: Add support for jh7110 SoC 2023-04-20 16:08:44 +08:00
spl.c riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation 2023-08-10 10:58:12 +08:00