u-boot/arch/riscv/cpu/andesv5/Kconfig
Leo Yu-Chi Liang 8900e2bbec riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2023-02-17 19:07:48 +08:00

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config RISCV_NDS
bool
select ARCH_EARLY_INIT_R
imply CPU
imply CPU_RISCV
imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
imply ANDES_PLICSW if (RISCV_MMODE || SPL_RISCV_MMODE)
imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE)
imply V5L2_CACHE
imply SPL_CPU
imply SPL_OPENSBI
imply SPL_LOAD_FIT
help
Run U-Boot on AndeStar V5 platforms and use some specific features
which are provided by Andes Technology AndeStar V5 families.