u-boot/board/freescale/t4rdb/ddr.h
Chunhe Lan 0b2e13d9cc powerpc/85xx: Add T4240RDB board support
T4240RDB board Specification
----------------------------
Memory subsystem:
   6GB DDR3
   128MB NOR flash
   2GB NAND flash

Ethernet:
   Eight 1G SGMII ports
   Four 10Gbps SFP+ ports

PCIe:
   Two PCIe slots

USB:
   Two USB2.0 Type A ports

SDHC:
   One SD-card port

SATA:
   One SATA port

UART:
   Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
2014-05-13 08:24:32 -07:00

78 lines
2.3 KiB
C

/*
* Copyright 2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __DDR_H__
#define __DDR_H__
struct board_specific_parameters {
u32 n_ranks;
u32 datarate_mhz_high;
u32 rank_gb;
u32 clk_adjust;
u32 wrlvl_start;
u32 wrlvl_ctl_2;
u32 wrlvl_ctl_3;
};
/*
* These tables contain all valid speeds we want to override with board
* specific parameters. datarate_mhz_high values need to be in ascending order
* for each n_ranks group.
*/
static const struct board_specific_parameters udimm0[] = {
/*
* memory controller 0
* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2 | ctl3
*/
{2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a},
{2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09},
{2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b},
{2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a},
{2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c},
{2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c},
{1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a},
{1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a},
{1, 1900, 0, 4, 8, 0x080a0a0c, 0x0e0e0f0a},
{1, 2140, 0, 4, 8, 0x090a0b0c, 0x0e0f100b},
{}
};
static const struct board_specific_parameters rdimm0[] = {
/*
* memory controller 0
* num| hi| rank| clk| wrlvl | wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2 | ctl3
*/
{4, 1350, 0, 5, 9, 0x08070605, 0x06070806},
{4, 1666, 0, 5, 11, 0x0a080706, 0x07090906},
{4, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07},
{2, 1350, 0, 5, 9, 0x08070605, 0x06070806},
{2, 1666, 0, 5, 11, 0x0a090806, 0x08090a06},
{2, 2140, 0, 5, 12, 0x0b090807, 0x080a0b07},
{1, 1350, 0, 5, 9, 0x08070605, 0x06070806},
{1, 1666, 0, 5, 11, 0x0a090806, 0x08090a06},
{1, 2140, 0, 4, 12, 0x0b090807, 0x080a0b07},
{}
};
/*
* The three slots have slightly different timing. The center values are good
* for all slots. We use identical speed tables for them. In future use, if
* DIMMs require separated tables, make more entries as needed.
*/
static const struct board_specific_parameters *udimms[] = {
udimm0,
};
/*
* The three slots have slightly different timing. See comments above.
*/
static const struct board_specific_parameters *rdimms[] = {
rdimm0,
};
#endif