Teresa Remmet 2943b8c563 board: phytec: phycore_imx8mp: Add 4000MTS RAM timings based on PCB rev ... Starting with PCB revision 3 we can safely make use of higher RAM frequency again. Make use of the EEPROM detection to determine the revision and use the updated RAM timings for new SoMs. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Yannic Moog <y.moog@phytec.de> Tested-by: Yannic Moog <y.moog@phytec.de>		2023-10-16 11:29:58 +02:00
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common	board: phytec: common: phytec_som_detection: Add helper for PCB revision	2023-10-16 11:27:58 +02:00
pcl063	global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace	2022-11-10 10:08:55 -05:00
pcm052	led: Drop led_default_state()	2022-04-28 09:26:44 -04:00
pcm058	treewide: rework linker symbol declarations in sections header	2023-08-09 09:21:42 -04:00
phycore_am335x_r2	global: Migrate CONFIG_MAX_RAM_BANK_SIZE to CFG	2022-12-23 10:14:51 -05:00
phycore_imx8mm	treewide: rework linker symbol declarations in sections header	2023-08-09 09:21:42 -04:00
phycore_imx8mp	board: phytec: phycore_imx8mp: Add 4000MTS RAM timings based on PCB rev	2023-10-16 11:29:58 +02:00
phycore_rk3288	rockchip: phycore_rk3288: remove phycore_init() function	2022-10-19 19:30:48 +08:00