Tom Warren 477393e787 Tegra114: Dalmore: Add pad config tables/code based on pinmux code ... Pad config registers exist in APB_MISC_GP space, and control slew rate, drive strengh, schmidt, high-speed, and low-power modes for all of the pingroups in Tegra30. This builds off of the pinmux way of constructing init tables to configure select pads (SDIOCFG, for instance) during pinmux_init(). Currently, no padcfg entries exist. SDIO3CFG will be added when the MMC driver is added as per the TRM to work with the SD-card slot on Dalmore E1611. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>		2013-03-14 11:49:14 -07:00
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clock.c	Tegra114: Add common CPU (shared) files	2013-02-11 10:35:25 -07:00
funcmux.c	Tegra114: Add common CPU (shared) files	2013-02-11 10:35:25 -07:00
Makefile	Tegra114: Add common CPU (shared) files	2013-02-11 10:35:25 -07:00
pinmux.c	Tegra114: Dalmore: Add pad config tables/code based on pinmux code	2013-03-14 11:49:14 -07:00