u-boot/arch/arm/dts/sama5d27_som1.dtsi

/*
 * sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SOM1
 *
 *  Copyright (C) 2017 Microchip Corporation
 *                     Wenyou Yang <wenyou.yang@microchip.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"
/ {
	model = "Atmel SAMA5D27 SOM1 EK";
	compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";

	memory {
		reg = <0x20000000 0x8000000>;
	};

	aliases {
		spi0 = &qspi1;
	};

	ahb {
		apb {
			qspi1: spi@f0024000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
				status = "okay";
				bootph-all;

				spi_flash@0 {
					compatible = "jedec,spi-nor";
					reg = <0>;
					spi-max-frequency = <50000000>;
					spi-rx-bus-width = <4>;
					spi-tx-bus-width = <4>;
					bootph-all;
				};
			};

			macb0: ethernet@f8008000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
				phy-mode = "rmii";
				status = "okay";

				ethernet-phy@1 {
					reg = <0x1>;
				};
			};

			i2c0: i2c@f8028000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c0_default>;
				status = "okay";

				i2c_eeprom: i2c_eeprom@50 {
					compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa02e48 */
					reg = <0x50>;
				};
			};

			i2c1: i2c@fc028000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c1_default>;
				status = "okay";
			};

			pioA: pinctrl@fc038000 {
				pinctrl_i2c0_default: i2c0_default {
					pinmux = <PIN_PD21__TWD0>,
						 <PIN_PD22__TWCK0>;
					bias-disable;
				};

				pinctrl_i2c1_default: i2c1_default {
					pinmux = <PIN_PD4__TWD1>,
						 <PIN_PD5__TWCK1>;
					bias-disable;
				};

				pinctrl_macb0_phy_irq: macb0_phy_irq {
					pinmux = <PIN_PD31__GPIO>;
					bias-disable;
				};

				pinctrl_macb0_rmii: macb0_rmii {
					pinmux = <PIN_PD9__GTXCK>,
						 <PIN_PD10__GTXEN>,
						 <PIN_PD11__GRXDV>,
						 <PIN_PD12__GRXER>,
						 <PIN_PD13__GRX0>,
						 <PIN_PD14__GRX1>,
						 <PIN_PD15__GTX0>,
						 <PIN_PD16__GTX1>,
						 <PIN_PD17__GMDC>,
						 <PIN_PD18__GMDIO>;
					bias-disable;
				};

				pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
					pinmux = <PIN_PB5__QSPI1_SCK>,
						 <PIN_PB6__QSPI1_CS>;
					bias-disable;
					bootph-all;
				};

				pinctrl_qspi1_dat_default: qspi1_dat_default {
					pinmux = <PIN_PB7__QSPI1_IO0>,
						 <PIN_PB8__QSPI1_IO1>,
						 <PIN_PB9__QSPI1_IO2>,
						 <PIN_PB10__QSPI1_IO3>;
					bias-pull-up;
					bootph-all;
				};
			};
		};
	};
};