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6492c9168a
Thes patch change the luton base device tree to use the newly added SPI bitbang driver. It also updates the "mscc_luton_defconfig" to use the new driver. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
96 lines
1.8 KiB
Text
96 lines
1.8 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mscc,luton";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "mips,mips24KEc";
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device_type = "cpu";
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reg = <0>;
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};
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};
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aliases {
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serial0 = &uart0;
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};
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sys_clk: sys-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <250000000>;
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};
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ahb_clk: ahb-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <208333333>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x60000000 0x10200000>;
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uart0: serial@10100000 {
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pinctrl-0 = <&uart_pins>;
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pinctrl-names = "default";
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compatible = "ns16550a";
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reg = <0x10100000 0x20>;
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clocks = <&ahb_clk>;
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reg-io-width = <4>;
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reg-shift = <2>;
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status = "disabled";
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};
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gpio: pinctrl@70068 {
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compatible = "mscc,luton-pinctrl";
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reg = <0x70068 0x68>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&gpio 0 0 32>;
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sgpio_pins: sgpio-pins {
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pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";
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function = "sio";
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};
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uart_pins: uart-pins {
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pins = "GPIO_30", "GPIO_31";
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function = "uart";
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};
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};
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sgpio: gpio@70130 {
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compatible = "mscc,luton-sgpio";
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status = "disabled";
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clocks = <&sys_clk>;
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pinctrl-0 = <&sgpio_pins>;
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pinctrl-names = "default";
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reg = <0x0070130 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&sgpio 0 0 64>;
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};
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spi0: spi-bitbang {
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compatible = "mscc,luton-bb-spi";
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status = "okay";
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reg = <0x10000064 0x4>;
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num-chipselects = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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