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https://github.com/AsahiLinux/u-boot
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d64caaf77d
The Assigned Clock parents and rates misses the fact that a "0" entry can
be passed to skip setting a parent or rate of an assigned clock as
described in the Linux clock bindings at [1].
This patch simply skips the clock reparenting if the DT parsing returns
-ENOENT and the clock rate setting if "0" is passed as clock rate.
[1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135
Fixes: f4fcba5c5b
"clk: implement clk_set_defaults()"
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
420 lines
8.1 KiB
C
420 lines
8.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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* Copyright (c) 2016, NVIDIA CORPORATION.
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* Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
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*/
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#include <common.h>
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#include <clk.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <dm/read.h>
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#include <dt-structs.h>
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#include <errno.h>
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static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
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{
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return (const struct clk_ops *)dev->driver->ops;
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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# if CONFIG_IS_ENABLED(OF_PLATDATA)
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int clk_get_by_index_platdata(struct udevice *dev, int index,
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struct phandle_1_arg *cells, struct clk *clk)
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{
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int ret;
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if (index != 0)
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return -ENOSYS;
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ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
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if (ret)
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return ret;
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clk->id = cells[0].arg[0];
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return 0;
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}
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# else
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static int clk_of_xlate_default(struct clk *clk,
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struct ofnode_phandle_args *args)
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{
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debug("%s(clk=%p)\n", __func__, clk);
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if (args->args_count > 1) {
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debug("Invaild args_count: %d\n", args->args_count);
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return -EINVAL;
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}
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if (args->args_count)
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clk->id = args->args[0];
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else
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clk->id = 0;
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return 0;
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}
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static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
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int index, struct clk *clk)
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{
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int ret;
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struct ofnode_phandle_args args;
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struct udevice *dev_clk;
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const struct clk_ops *ops;
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debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
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assert(clk);
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clk->dev = NULL;
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ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
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index, &args);
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if (ret) {
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debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
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__func__, ret);
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return ret;
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}
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ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
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if (ret) {
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debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
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__func__, ret);
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return ret;
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}
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clk->dev = dev_clk;
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ops = clk_dev_ops(dev_clk);
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if (ops->of_xlate)
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ret = ops->of_xlate(clk, &args);
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else
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ret = clk_of_xlate_default(clk, &args);
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if (ret) {
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debug("of_xlate() failed: %d\n", ret);
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return ret;
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}
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return clk_request(dev_clk, clk);
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}
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int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
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{
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return clk_get_by_indexed_prop(dev, "clocks", index, clk);
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}
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int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
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{
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int i, ret, err, count;
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bulk->count = 0;
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count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
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if (count < 1)
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return count;
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bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
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if (!bulk->clks)
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return -ENOMEM;
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for (i = 0; i < count; i++) {
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ret = clk_get_by_index(dev, i, &bulk->clks[i]);
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if (ret < 0)
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goto bulk_get_err;
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++bulk->count;
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}
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return 0;
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bulk_get_err:
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err = clk_release_all(bulk->clks, bulk->count);
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if (err)
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debug("%s: could release all clocks for %p\n",
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__func__, dev);
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return ret;
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}
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static int clk_set_default_parents(struct udevice *dev)
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{
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struct clk clk, parent_clk;
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int index;
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int num_parents;
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int ret;
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num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
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"#clock-cells");
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if (num_parents < 0) {
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debug("%s: could not read assigned-clock-parents for %p\n",
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__func__, dev);
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return 0;
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}
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for (index = 0; index < num_parents; index++) {
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ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
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index, &parent_clk);
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/* If -ENOENT, this is a no-op entry */
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if (ret == -ENOENT)
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continue;
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if (ret) {
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debug("%s: could not get parent clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
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index, &clk);
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if (ret) {
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debug("%s: could not get assigned clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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ret = clk_set_parent(&clk, &parent_clk);
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/*
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* Not all drivers may support clock-reparenting (as of now).
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* Ignore errors due to this.
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*/
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if (ret == -ENOSYS)
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continue;
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if (ret) {
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debug("%s: failed to reparent clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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}
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return 0;
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}
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static int clk_set_default_rates(struct udevice *dev)
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{
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struct clk clk;
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int index;
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int num_rates;
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int size;
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int ret = 0;
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u32 *rates = NULL;
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size = dev_read_size(dev, "assigned-clock-rates");
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if (size < 0)
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return 0;
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num_rates = size / sizeof(u32);
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rates = calloc(num_rates, sizeof(u32));
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if (!rates)
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return -ENOMEM;
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ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
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if (ret)
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goto fail;
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for (index = 0; index < num_rates; index++) {
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/* If 0 is passed, this is a no-op */
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if (!rates[index])
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continue;
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ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
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index, &clk);
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if (ret) {
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debug("%s: could not get assigned clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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continue;
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}
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ret = clk_set_rate(&clk, rates[index]);
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if (ret < 0) {
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debug("%s: failed to set rate on clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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break;
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}
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}
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fail:
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free(rates);
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return ret;
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}
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int clk_set_defaults(struct udevice *dev)
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{
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int ret;
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/* If this is running pre-reloc state, don't take any action. */
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if (!(gd->flags & GD_FLG_RELOC))
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return 0;
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debug("%s(%s)\n", __func__, dev_read_name(dev));
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ret = clk_set_default_parents(dev);
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if (ret)
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return ret;
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ret = clk_set_default_rates(dev);
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if (ret < 0)
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return ret;
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return 0;
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}
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# endif /* OF_PLATDATA */
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int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
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{
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int index;
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debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
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clk->dev = NULL;
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index = dev_read_stringlist_search(dev, "clock-names", name);
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if (index < 0) {
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debug("fdt_stringlist_search() failed: %d\n", index);
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return index;
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}
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return clk_get_by_index(dev, index, clk);
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}
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int clk_release_all(struct clk *clk, int count)
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{
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int i, ret;
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for (i = 0; i < count; i++) {
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debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
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/* check if clock has been previously requested */
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if (!clk[i].dev)
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continue;
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ret = clk_disable(&clk[i]);
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if (ret && ret != -ENOSYS)
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return ret;
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ret = clk_free(&clk[i]);
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if (ret && ret != -ENOSYS)
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return ret;
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}
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return 0;
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}
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#endif /* OF_CONTROL */
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int clk_request(struct udevice *dev, struct clk *clk)
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{
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const struct clk_ops *ops = clk_dev_ops(dev);
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debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
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clk->dev = dev;
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if (!ops->request)
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return 0;
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return ops->request(clk);
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}
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int clk_free(struct clk *clk)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p)\n", __func__, clk);
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if (!ops->free)
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return 0;
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return ops->free(clk);
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}
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ulong clk_get_rate(struct clk *clk)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p)\n", __func__, clk);
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if (!ops->get_rate)
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return -ENOSYS;
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return ops->get_rate(clk);
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}
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ulong clk_set_rate(struct clk *clk, ulong rate)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
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if (!ops->set_rate)
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return -ENOSYS;
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return ops->set_rate(clk, rate);
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}
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
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if (!ops->set_parent)
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return -ENOSYS;
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return ops->set_parent(clk, parent);
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}
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int clk_enable(struct clk *clk)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p)\n", __func__, clk);
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if (!ops->enable)
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return -ENOSYS;
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return ops->enable(clk);
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}
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int clk_enable_bulk(struct clk_bulk *bulk)
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{
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int i, ret;
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for (i = 0; i < bulk->count; i++) {
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ret = clk_enable(&bulk->clks[i]);
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if (ret < 0 && ret != -ENOSYS)
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return ret;
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}
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return 0;
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}
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int clk_disable(struct clk *clk)
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{
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const struct clk_ops *ops = clk_dev_ops(clk->dev);
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debug("%s(clk=%p)\n", __func__, clk);
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if (!ops->disable)
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return -ENOSYS;
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return ops->disable(clk);
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}
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int clk_disable_bulk(struct clk_bulk *bulk)
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{
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int i, ret;
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for (i = 0; i < bulk->count; i++) {
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ret = clk_disable(&bulk->clks[i]);
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if (ret < 0 && ret != -ENOSYS)
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return ret;
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}
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return 0;
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}
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UCLASS_DRIVER(clk) = {
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.id = UCLASS_CLK,
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.name = "clk",
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};
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