u-boot/arch/riscv
Bin Meng 5bde2152d4 riscv: Implement new SBI v0.2 extensions
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.

Implement the replacement extensions and few additional new SBI
function calls that makes way for a better SBI interface in future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
..
cpu riscv: Remove unnecessary instruction 2020-02-10 14:51:52 +08:00
dts riscv: dts: Add #address-cells and #size-cells in nor node 2019-12-10 08:23:10 +08:00
include/asm riscv: Implement new SBI v0.2 extensions 2020-03-17 11:29:54 +08:00
lib riscv: Implement new SBI v0.2 extensions 2020-03-17 11:29:54 +08:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: Introduce a new config for SBI v0.1 2020-03-17 11:29:54 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00