mirror of
https://github.com/AsahiLinux/u-boot
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401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
140 lines
3.6 KiB
C
140 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Exynos pinctrl driver common code.
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* Copyright (C) 2016 Samsung Electronics
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* Thomas Abraham <thomas.ab@samsung.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include "pinctrl-exynos.h"
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* exynos_pinctrl_setup_peri: setup pinctrl for a peripheral.
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* conf: soc specific pin configuration data array
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* num_conf: number of configurations in the conf array.
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* base: base address of the pin controller.
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*/
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void exynos_pinctrl_setup_peri(struct exynos_pinctrl_config_data *conf,
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unsigned int num_conf, unsigned long base)
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{
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unsigned int idx, val;
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for (idx = 0; idx < num_conf; idx++) {
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val = readl(base + conf[idx].offset);
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val &= ~(conf[idx].mask);
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val |= conf[idx].value;
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writel(val, base + conf[idx].offset);
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}
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}
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/* given a pin-name, return the address of pin config registers */
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static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name,
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u32 *pin)
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{
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struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
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const struct samsung_pin_ctrl *pin_ctrl = priv->pin_ctrl;
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const struct samsung_pin_bank_data *bank_data = pin_ctrl->pin_banks;
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u32 nr_banks = pin_ctrl->nr_banks, idx = 0;
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char bank[10];
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/*
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* The format of the pin name is <bank name>-<pin_number>.
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* Example: gpa0-4 (gpa0 is the bank name and 4 is the pin number.
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*/
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while (pin_name[idx] != '-') {
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bank[idx] = pin_name[idx];
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idx++;
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}
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bank[idx] = '\0';
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*pin = pin_name[++idx] - '0';
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/* lookup the pin bank data using the pin bank name */
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for (idx = 0; idx < nr_banks; idx++)
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if (!strcmp(bank, bank_data[idx].name))
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break;
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return priv->base + bank_data[idx].offset;
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}
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/**
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* exynos_pinctrl_set_state: configure a pin state.
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* dev: the pinctrl device to be configured.
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* config: the state to be configured.
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*/
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int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config)
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{
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const void *fdt = gd->fdt_blob;
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int node = dev_of_offset(config);
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unsigned int count, idx, pin_num;
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unsigned int pinfunc, pinpud, pindrv;
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unsigned long reg, value;
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const char *name;
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/*
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* refer to the following document for the pinctrl bindings
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* linux/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
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*/
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count = fdt_stringlist_count(fdt, node, "samsung,pins");
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if (count <= 0)
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return -EINVAL;
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pinfunc = fdtdec_get_int(fdt, node, "samsung,pin-function", -1);
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pinpud = fdtdec_get_int(fdt, node, "samsung,pin-pud", -1);
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pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1);
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for (idx = 0; idx < count; idx++) {
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name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL);
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if (!name)
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continue;
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reg = pin_to_bank_base(dev, name, &pin_num);
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if (pinfunc != -1) {
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value = readl(reg + PIN_CON);
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value &= ~(0xf << (pin_num << 2));
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value |= (pinfunc << (pin_num << 2));
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writel(value, reg + PIN_CON);
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}
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if (pinpud != -1) {
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value = readl(reg + PIN_PUD);
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value &= ~(0x3 << (pin_num << 1));
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value |= (pinpud << (pin_num << 1));
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writel(value, reg + PIN_PUD);
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}
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if (pindrv != -1) {
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value = readl(reg + PIN_DRV);
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value &= ~(0x3 << (pin_num << 1));
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value |= (pindrv << (pin_num << 1));
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writel(value, reg + PIN_DRV);
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}
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}
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return 0;
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}
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int exynos_pinctrl_probe(struct udevice *dev)
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{
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struct exynos_pinctrl_priv *priv;
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fdt_addr_t base;
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priv = dev_get_priv(dev);
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if (!priv)
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return -EINVAL;
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base = dev_read_addr(dev);
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if (base == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->base = base;
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priv->pin_ctrl = (struct samsung_pin_ctrl *)dev_get_driver_data(dev) +
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dev_seq(dev);
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return 0;
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}
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