mirror of
https://github.com/AsahiLinux/u-boot
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e2b57ffbaf
In the current rk3288.dtsi file the compatible string for the DisplayPort(DP) node ends with "edp". The string in the binding ends with "dp" which conflicts with "cdn-dp" as a search term. Add "rk3288-dp" as compare string to select vop_id. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # chromebook-jerry Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
489 lines
13 KiB
C
489 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2015 Google, Inc
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* Copyright 2014 Rockchip Inc.
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*/
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#include <common.h>
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#include <clk.h>
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#include <display.h>
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <edid.h>
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#include <log.h>
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#include <regmap.h>
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#include <reset.h>
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#include <syscon.h>
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#include <video.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/edp_rk3288.h>
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#include <asm/arch-rockchip/vop_rk3288.h>
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#include <dm/device-internal.h>
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#include <dm/uclass-internal.h>
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#include <efi.h>
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#include <efi_loader.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include <power/regulator.h>
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#include "rk_vop.h"
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DECLARE_GLOBAL_DATA_PTR;
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enum vop_pol {
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HSYNC_POSITIVE = 0,
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VSYNC_POSITIVE = 1,
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DEN_NEGATIVE = 2,
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DCLK_INVERT = 3
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};
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static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase,
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int fb_bits_per_pixel,
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const struct display_timing *edid,
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struct reset_ctl *dclk_rst)
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{
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u32 lb_mode;
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u32 rgb_mode;
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u32 hactive = edid->hactive.typ;
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u32 vactive = edid->vactive.typ;
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int ret;
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writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1),
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®s->win0_act_info);
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writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) |
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V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ),
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®s->win0_dsp_st);
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writel(V_DSP_WIDTH(hactive - 1) |
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V_DSP_HEIGHT(vactive - 1),
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®s->win0_dsp_info);
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clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR,
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V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0));
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switch (fb_bits_per_pixel) {
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case 16:
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rgb_mode = RGB565;
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writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir);
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break;
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case 24:
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rgb_mode = RGB888;
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writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir);
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break;
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case 32:
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default:
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rgb_mode = ARGB8888;
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writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir);
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break;
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}
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if (hactive > 2560)
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lb_mode = LB_RGB_3840X2;
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else if (hactive > 1920)
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lb_mode = LB_RGB_2560X4;
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else if (hactive > 1280)
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lb_mode = LB_RGB_1920X5;
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else
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lb_mode = LB_RGB_1280X8;
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clrsetbits_le32(®s->win0_ctrl0,
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M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN,
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V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) |
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V_WIN0_EN(1));
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writel(fbbase, ®s->win0_yrgb_mst);
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writel(0x01, ®s->reg_cfg_done); /* enable reg config */
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ret = reset_assert(dclk_rst);
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if (ret) {
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dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret);
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return;
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}
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udelay(20);
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ret = reset_deassert(dclk_rst);
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if (ret)
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dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret);
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}
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static void rkvop_set_pin_polarity(struct udevice *dev,
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enum vop_modes mode, u32 polarity)
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{
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struct rkvop_driverdata *ops =
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(struct rkvop_driverdata *)dev_get_driver_data(dev);
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if (ops->set_pin_polarity)
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ops->set_pin_polarity(dev, mode, polarity);
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}
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static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode)
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{
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struct rk_vop_priv *priv = dev_get_priv(dev);
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struct rk3288_vop *regs = priv->regs;
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/* remove from standby */
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clrbits_le32(®s->sys_ctrl, V_STANDBY_EN(1));
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switch (mode) {
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case VOP_MODE_HDMI:
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clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
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V_HDMI_OUT_EN(1));
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break;
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case VOP_MODE_EDP:
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clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
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V_EDP_OUT_EN(1));
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break;
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#if defined(CONFIG_ROCKCHIP_RK3288)
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case VOP_MODE_LVDS:
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clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
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V_RGB_OUT_EN(1));
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break;
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#endif
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case VOP_MODE_MIPI:
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clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
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V_MIPI_OUT_EN(1));
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break;
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default:
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debug("%s: unsupported output mode %x\n", __func__, mode);
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}
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}
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static void rkvop_mode_set(struct udevice *dev,
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const struct display_timing *edid,
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enum vop_modes mode)
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{
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struct rk_vop_priv *priv = dev_get_priv(dev);
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struct rk3288_vop *regs = priv->regs;
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struct rkvop_driverdata *data =
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(struct rkvop_driverdata *)dev_get_driver_data(dev);
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u32 hactive = edid->hactive.typ;
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u32 vactive = edid->vactive.typ;
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u32 hsync_len = edid->hsync_len.typ;
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u32 hback_porch = edid->hback_porch.typ;
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u32 vsync_len = edid->vsync_len.typ;
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u32 vback_porch = edid->vback_porch.typ;
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u32 hfront_porch = edid->hfront_porch.typ;
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u32 vfront_porch = edid->vfront_porch.typ;
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int mode_flags;
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u32 pin_polarity;
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pin_polarity = BIT(DCLK_INVERT);
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if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH)
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pin_polarity |= BIT(HSYNC_POSITIVE);
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if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH)
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pin_polarity |= BIT(VSYNC_POSITIVE);
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rkvop_set_pin_polarity(dev, mode, pin_polarity);
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rkvop_enable_output(dev, mode);
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mode_flags = 0; /* RGB888 */
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if ((data->features & VOP_FEATURE_OUTPUT_10BIT) &&
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(mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP))
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mode_flags = 15; /* RGBaaa */
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clrsetbits_le32(®s->dsp_ctrl0, M_DSP_OUT_MODE,
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V_DSP_OUT_MODE(mode_flags));
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writel(V_HSYNC(hsync_len) |
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V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch),
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®s->dsp_htotal_hs_end);
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writel(V_HEAP(hsync_len + hback_porch + hactive) |
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V_HASP(hsync_len + hback_porch),
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®s->dsp_hact_st_end);
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writel(V_VSYNC(vsync_len) |
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V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch),
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®s->dsp_vtotal_vs_end);
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writel(V_VAEP(vsync_len + vback_porch + vactive)|
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V_VASP(vsync_len + vback_porch),
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®s->dsp_vact_st_end);
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writel(V_HEAP(hsync_len + hback_porch + hactive) |
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V_HASP(hsync_len + hback_porch),
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®s->post_dsp_hact_info);
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writel(V_VAEP(vsync_len + vback_porch + vactive)|
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V_VASP(vsync_len + vback_porch),
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®s->post_dsp_vact_info);
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writel(0x01, ®s->reg_cfg_done); /* enable reg config */
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}
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/**
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* rk_display_init() - Try to enable the given display device
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*
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* This function performs many steps:
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* - Finds the display device being referenced by @ep_node
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* - Puts the VOP's ID into its uclass platform data
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* - Probes the device to set it up
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* - Reads the EDID timing information
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* - Sets up the VOP clocks, etc. for the selected pixel clock and display mode
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* - Enables the display (the display device handles this and will do different
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* things depending on the display type)
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* - Tells the uclass about the display resolution so that the console will
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* appear correctly
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*
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* @dev: VOP device that we want to connect to the display
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* @fbbase: Frame buffer address
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* @ep_node: Device tree node to process - this is the offset of an endpoint
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* node within the VOP's 'port' list.
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* Return: 0 if OK, -ve if something went wrong
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*/
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static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
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{
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struct video_priv *uc_priv = dev_get_uclass_priv(dev);
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struct rk_vop_priv *priv = dev_get_priv(dev);
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int vop_id, remote_vop_id;
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struct rk3288_vop *regs = priv->regs;
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struct display_timing timing;
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struct udevice *disp;
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int ret;
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u32 remote_phandle;
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struct display_plat *disp_uc_plat;
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struct clk clk;
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enum video_log2_bpp l2bpp;
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ofnode remote;
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const char *compat;
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struct reset_ctl dclk_rst;
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debug("%s(%s, 0x%lx, %s)\n", __func__,
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dev_read_name(dev), fbbase, ofnode_get_name(ep_node));
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ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle);
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if (ret)
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return ret;
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remote = ofnode_get_by_phandle(remote_phandle);
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if (!ofnode_valid(remote))
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return -EINVAL;
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remote_vop_id = ofnode_read_u32_default(remote, "reg", -1);
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debug("remote vop_id=%d\n", remote_vop_id);
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/*
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* The remote-endpoint references into a subnode of the encoder
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* (i.e. HDMI, MIPI, etc.) with the DTS looking something like
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* the following (assume 'hdmi_in_vopl' to be referenced):
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*
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* hdmi: hdmi@ff940000 {
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* ports {
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* hdmi_in: port {
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* hdmi_in_vopb: endpoint@0 { ... };
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* hdmi_in_vopl: endpoint@1 { ... };
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* }
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* }
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* }
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*
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* The original code had 3 steps of "walking the parent", but
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* a much better (as in: less likely to break if the DTS
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* changes) way of doing this is to "find the enclosing device
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* of UCLASS_DISPLAY".
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*/
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while (ofnode_valid(remote)) {
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remote = ofnode_get_parent(remote);
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if (!ofnode_valid(remote)) {
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debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n",
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__func__, dev_read_name(dev));
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return -EINVAL;
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}
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uclass_find_device_by_ofnode(UCLASS_DISPLAY, remote, &disp);
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if (disp)
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break;
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};
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compat = ofnode_get_property(remote, "compatible", NULL);
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if (!compat) {
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debug("%s(%s): Failed to find compatible property\n",
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__func__, dev_read_name(dev));
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return -EINVAL;
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}
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if (strstr(compat, "edp") ||
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strstr(compat, "rk3288-dp")) {
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vop_id = VOP_MODE_EDP;
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} else if (strstr(compat, "mipi")) {
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vop_id = VOP_MODE_MIPI;
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} else if (strstr(compat, "hdmi")) {
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vop_id = VOP_MODE_HDMI;
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} else if (strstr(compat, "cdn-dp")) {
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vop_id = VOP_MODE_DP;
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} else if (strstr(compat, "lvds")) {
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vop_id = VOP_MODE_LVDS;
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} else {
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debug("%s(%s): Failed to find vop mode for %s\n",
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__func__, dev_read_name(dev), compat);
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return -EINVAL;
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}
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debug("vop_id=%d\n", vop_id);
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disp_uc_plat = dev_get_uclass_plat(disp);
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debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat);
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if (display_in_use(disp)) {
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debug(" - device in use\n");
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return -EBUSY;
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}
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disp_uc_plat->source_id = remote_vop_id;
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disp_uc_plat->src_dev = dev;
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ret = device_probe(disp);
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if (ret) {
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debug("%s: device '%s' display won't probe (ret=%d)\n",
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__func__, dev->name, ret);
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return ret;
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}
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ret = display_read_timing(disp, &timing);
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if (ret) {
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debug("%s: Failed to read timings\n", __func__);
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return ret;
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}
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ret = clk_get_by_index(dev, 1, &clk);
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if (!ret)
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ret = clk_set_rate(&clk, timing.pixelclock.typ);
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if (IS_ERR_VALUE(ret)) {
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debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
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return ret;
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}
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/* Set bitwidth for vop display according to vop mode */
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switch (vop_id) {
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case VOP_MODE_EDP:
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#if defined(CONFIG_ROCKCHIP_RK3288)
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case VOP_MODE_LVDS:
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#endif
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l2bpp = VIDEO_BPP16;
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break;
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case VOP_MODE_HDMI:
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case VOP_MODE_MIPI:
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l2bpp = VIDEO_BPP32;
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break;
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default:
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l2bpp = VIDEO_BPP16;
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}
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rkvop_mode_set(dev, &timing, vop_id);
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ret = reset_get_by_name(dev, "dclk", &dclk_rst);
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if (ret) {
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dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret);
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return ret;
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}
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rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst);
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ret = display_enable(disp, 1 << l2bpp, &timing);
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if (ret)
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return ret;
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uc_priv->xsize = timing.hactive.typ;
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uc_priv->ysize = timing.vactive.typ;
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uc_priv->bpix = l2bpp;
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debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
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return 0;
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}
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void rk_vop_probe_regulators(struct udevice *dev,
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const char * const *names, int cnt)
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{
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int i, ret;
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const char *name;
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struct udevice *reg;
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for (i = 0; i < cnt; ++i) {
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name = names[i];
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debug("%s: probing regulator '%s'\n", dev->name, name);
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ret = regulator_autoset_by_name(name, ®);
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if (!ret)
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ret = regulator_set_enable(reg, true);
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}
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}
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int rk_vop_probe(struct udevice *dev)
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{
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struct video_uc_plat *plat = dev_get_uclass_plat(dev);
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struct rk_vop_priv *priv = dev_get_priv(dev);
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int ret = 0;
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ofnode port, node;
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struct reset_ctl ahb_rst;
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/* Before relocation we don't need to do anything */
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if (!(gd->flags & GD_FLG_RELOC))
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return 0;
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ret = reset_get_by_name(dev, "ahb", &ahb_rst);
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if (ret) {
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dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret);
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return ret;
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}
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ret = reset_assert(&ahb_rst);
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if (ret) {
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dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret);
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return ret;
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}
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udelay(20);
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ret = reset_deassert(&ahb_rst);
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if (ret) {
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dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret);
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return ret;
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}
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#if defined(CONFIG_EFI_LOADER)
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debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base);
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efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE);
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#endif
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priv->regs = (struct rk3288_vop *)dev_read_addr(dev);
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/*
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* Try all the ports until we find one that works. In practice this
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* tries EDP first if available, then HDMI.
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*
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* Note that rockchip_vop_set_clk() always uses NPLL as the source
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* clock so it is currently not possible to use more than one display
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* device simultaneously.
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*/
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port = dev_read_subnode(dev, "port");
|
|
if (!ofnode_valid(port)) {
|
|
debug("%s(%s): 'port' subnode not found\n",
|
|
__func__, dev_read_name(dev));
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (node = ofnode_first_subnode(port);
|
|
ofnode_valid(node);
|
|
node = dev_read_next_subnode(node)) {
|
|
ret = rk_display_init(dev, plat->base, node);
|
|
if (ret)
|
|
debug("Device failed: ret=%d\n", ret);
|
|
if (!ret)
|
|
break;
|
|
}
|
|
video_set_flush_dcache(dev, 1);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int rk_vop_bind(struct udevice *dev)
|
|
{
|
|
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
|
|
|
|
plat->size = 4 * (CONFIG_VIDEO_ROCKCHIP_MAX_XRES *
|
|
CONFIG_VIDEO_ROCKCHIP_MAX_YRES);
|
|
|
|
return 0;
|
|
}
|