Marek Vasut d072065690 ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing ... Adjust the DRAM timing settings for this board per ones provided by hardware department. The change is applied to the LPDDR4 MR11 register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes stability issues on subset of boards. The DDR PHY PIE block has been updated accordingly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>		2022-09-18 22:56:10 +02:00
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imx8mm_edm_sbc	ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing	2022-09-18 22:56:10 +02:00