mirror of
https://github.com/AsahiLinux/u-boot
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a86ac9540e
Since commit 0e7368c6c4 (kbuild: prepare for moving headers into
mach-*/include/mach), we can replace #include <asm/arch/*.h> with
<mach/*.h> so we do not need to create the symbolic link during the
build.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/*
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* Copyright (C) 2011-2014 Panasonic Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <mach/sg-regs.h>
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void pin_init(void)
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{
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u32 tmp;
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/* Comment format: PAD Name -> Function Name */
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#ifdef CONFIG_UNIPHIER_SERIAL
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sg_set_pinsel(85, 1); /* HSDOUT3 -> RXD0 */
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sg_set_pinsel(88, 1); /* HDDOUT6 -> TXD0 */
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sg_set_pinsel(69, 23); /* PCIOWR -> TXD1 */
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sg_set_pinsel(70, 23); /* PCIORD -> RXD1 */
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sg_set_pinsel(128, 13); /* XIRQ6 -> TXD2 */
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sg_set_pinsel(129, 13); /* XIRQ7 -> RXD2 */
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sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */
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sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */
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#endif
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#ifdef CONFIG_NAND_DENALI
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sg_set_pinsel(158, 0); /* XNFRE -> XNFRE_GB */
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sg_set_pinsel(159, 0); /* XNFWE -> XNFWE_GB */
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sg_set_pinsel(160, 0); /* XFALE -> NFALE_GB */
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sg_set_pinsel(161, 0); /* XFCLE -> NFCLE_GB */
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sg_set_pinsel(162, 0); /* XNFWP -> XFNWP_GB */
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sg_set_pinsel(163, 0); /* XNFCE0 -> XNFCE0_GB */
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sg_set_pinsel(164, 0); /* NANDRYBY0 -> NANDRYBY0_GB */
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sg_set_pinsel(22, 0); /* MMCCLK -> XFNCE1_GB */
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sg_set_pinsel(23, 0); /* MMCCMD -> NANDRYBY1_GB */
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sg_set_pinsel(24, 0); /* MMCDAT0 -> NFD0_GB */
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sg_set_pinsel(25, 0); /* MMCDAT1 -> NFD1_GB */
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sg_set_pinsel(26, 0); /* MMCDAT2 -> NFD2_GB */
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sg_set_pinsel(27, 0); /* MMCDAT3 -> NFD3_GB */
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sg_set_pinsel(28, 0); /* MMCDAT4 -> NFD4_GB */
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sg_set_pinsel(29, 0); /* MMCDAT5 -> NFD5_GB */
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sg_set_pinsel(30, 0); /* MMCDAT6 -> NFD6_GB */
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sg_set_pinsel(31, 0); /* MMCDAT7 -> NFD7_GB */
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#endif
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#ifdef CONFIG_USB_EHCI_UNIPHIER
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sg_set_pinsel(53, 0); /* USB0VBUS -> USB0VBUS */
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sg_set_pinsel(54, 0); /* USB0OD -> USB0OD */
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sg_set_pinsel(55, 0); /* USB1VBUS -> USB1VBUS */
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sg_set_pinsel(56, 0); /* USB1OD -> USB1OD */
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/* sg_set_pinsel(67, 23); */ /* PCOE -> USB2VBUS */
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/* sg_set_pinsel(68, 23); */ /* PCWAIT -> USB2OD */
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#endif
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tmp = readl(SG_IECTRL);
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tmp |= 0x41;
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writel(tmp, SG_IECTRL);
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}
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