Algapally Santosh Sagar 5528f79778 xilinx: board: Add support to pick bootscr address from DT ... The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com		2023-09-21 13:20:11 +02:00
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bootscripts	xilinx: Add sd boot command script for reference	2019-10-08 09:11:13 +02:00
common	xilinx: board: Add support to pick bootscr address from DT	2023-09-21 13:20:11 +02:00
microblaze-generic	arm64: xilinx: Move board_get_usable_ram_top() to common location	2022-09-13 11:32:48 +02:00
versal	arm64: zynqmp: Switch to amd.com emails	2023-07-21 09:00:38 +02:00
versal-net	arm64: versal-net: spi: Update boot sequence dynamically	2023-07-21 09:00:38 +02:00
zynq	xilinx: zynq: Add the missing function prototypes	2023-07-21 09:00:38 +02:00
zynqmp	xilinx: zynqmp: Extract aes operation into new file	2023-09-21 13:20:10 +02:00
zynqmp_r5	.mailmap: Start to use new amd.com email address	2022-04-19 14:51:11 -04:00
Kconfig	xilinx: Remove unused ZYNQ_MAC_IN_EEPROM/ZYNQ_GEM_I2C_MAC_OFFSET entries	2022-12-05 08:55:55 +01:00