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https://github.com/AsahiLinux/u-boot
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0478dac62a
At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini <trini@konsulko.com>
145 lines
5.1 KiB
C
145 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2003, 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*/
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/*
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* ARM PrimeCell UART's (PL010 & PL011)
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* ------------------------------------
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*
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* Definitions common to both PL010 & PL011
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*
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*/
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#ifndef __ASSEMBLY__
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/*
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* We can use a combined structure for PL010 and PL011, because they overlap
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* only in common registers.
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*/
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struct pl01x_regs {
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u32 dr; /* 0x00 Data register */
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u32 ecr; /* 0x04 Error clear register (Write) */
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u32 pl010_lcrh; /* 0x08 Line control register, high byte */
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u32 pl010_lcrm; /* 0x0C Line control register, middle byte */
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u32 pl010_lcrl; /* 0x10 Line control register, low byte */
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u32 pl010_cr; /* 0x14 Control register */
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u32 fr; /* 0x18 Flag register (Read only) */
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#ifdef CONFIG_PL011_SERIAL_RLCR
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u32 pl011_rlcr; /* 0x1c Receive line control register */
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#else
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u32 reserved;
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#endif
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u32 ilpr; /* 0x20 IrDA low-power counter register */
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u32 pl011_ibrd; /* 0x24 Integer baud rate register */
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u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
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u32 pl011_lcrh; /* 0x2C Line control register */
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u32 pl011_cr; /* 0x30 Control register */
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};
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#if CONFIG_IS_ENABLED(DM_SERIAL)
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int pl01x_serial_of_to_plat(struct udevice *dev);
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int pl01x_serial_probe(struct udevice *dev);
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/* Needed for external pl01x_serial_ops drivers */
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int pl01x_serial_putc(struct udevice *dev, const char ch);
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int pl01x_serial_pending(struct udevice *dev, bool input);
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int pl01x_serial_getc(struct udevice *dev);
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int pl01x_serial_setbrg(struct udevice *dev, int baudrate);
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struct pl01x_priv {
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struct pl01x_regs *regs;
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enum pl01x_type type;
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};
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#endif /* CONFIG_DM_SERIAL */
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#endif /* !__ASSEMBLY__ */
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#define UART_PL01x_RSR_OE 0x08
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#define UART_PL01x_RSR_BE 0x04
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#define UART_PL01x_RSR_PE 0x02
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#define UART_PL01x_RSR_FE 0x01
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#define UART_PL01x_FR_TXFE 0x80
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#define UART_PL01x_FR_RXFF 0x40
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#define UART_PL01x_FR_TXFF 0x20
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#define UART_PL01x_FR_RXFE 0x10
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#define UART_PL01x_FR_BUSY 0x08
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#define UART_PL01x_FR_TMSK (UART_PL01x_FR_TXFF + UART_PL01x_FR_BUSY)
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/*
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* PL010 definitions
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*
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*/
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#define UART_PL010_CR_LPE (1 << 7)
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#define UART_PL010_CR_RTIE (1 << 6)
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#define UART_PL010_CR_TIE (1 << 5)
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#define UART_PL010_CR_RIE (1 << 4)
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#define UART_PL010_CR_MSIE (1 << 3)
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#define UART_PL010_CR_IIRLP (1 << 2)
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#define UART_PL010_CR_SIREN (1 << 1)
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#define UART_PL010_CR_UARTEN (1 << 0)
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#define UART_PL010_LCRH_WLEN_8 (3 << 5)
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#define UART_PL010_LCRH_WLEN_7 (2 << 5)
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#define UART_PL010_LCRH_WLEN_6 (1 << 5)
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#define UART_PL010_LCRH_WLEN_5 (0 << 5)
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#define UART_PL010_LCRH_FEN (1 << 4)
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#define UART_PL010_LCRH_STP2 (1 << 3)
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#define UART_PL010_LCRH_EPS (1 << 2)
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#define UART_PL010_LCRH_PEN (1 << 1)
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#define UART_PL010_LCRH_BRK (1 << 0)
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#define UART_PL010_BAUD_460800 1
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#define UART_PL010_BAUD_230400 3
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#define UART_PL010_BAUD_115200 7
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#define UART_PL010_BAUD_57600 15
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#define UART_PL010_BAUD_38400 23
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#define UART_PL010_BAUD_19200 47
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#define UART_PL010_BAUD_14400 63
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#define UART_PL010_BAUD_9600 95
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#define UART_PL010_BAUD_4800 191
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#define UART_PL010_BAUD_2400 383
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#define UART_PL010_BAUD_1200 767
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/*
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* PL011 definitions
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*
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*/
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#define UART_PL011_LCRH_SPS (1 << 7)
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#define UART_PL011_LCRH_WLEN_8 (3 << 5)
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#define UART_PL011_LCRH_WLEN_7 (2 << 5)
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#define UART_PL011_LCRH_WLEN_6 (1 << 5)
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#define UART_PL011_LCRH_WLEN_5 (0 << 5)
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#define UART_PL011_LCRH_FEN (1 << 4)
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#define UART_PL011_LCRH_STP2 (1 << 3)
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#define UART_PL011_LCRH_EPS (1 << 2)
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#define UART_PL011_LCRH_PEN (1 << 1)
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#define UART_PL011_LCRH_BRK (1 << 0)
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#define UART_PL011_CR_CTSEN (1 << 15)
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#define UART_PL011_CR_RTSEN (1 << 14)
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#define UART_PL011_CR_OUT2 (1 << 13)
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#define UART_PL011_CR_OUT1 (1 << 12)
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#define UART_PL011_CR_RTS (1 << 11)
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#define UART_PL011_CR_DTR (1 << 10)
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#define UART_PL011_CR_RXE (1 << 9)
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#define UART_PL011_CR_TXE (1 << 8)
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#define UART_PL011_CR_LPE (1 << 7)
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#define UART_PL011_CR_IIRLP (1 << 2)
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#define UART_PL011_CR_SIREN (1 << 1)
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#define UART_PL011_CR_UARTEN (1 << 0)
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#define UART_PL011_IMSC_OEIM (1 << 10)
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#define UART_PL011_IMSC_BEIM (1 << 9)
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#define UART_PL011_IMSC_PEIM (1 << 8)
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#define UART_PL011_IMSC_FEIM (1 << 7)
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#define UART_PL011_IMSC_RTIM (1 << 6)
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#define UART_PL011_IMSC_TXIM (1 << 5)
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#define UART_PL011_IMSC_RXIM (1 << 4)
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#define UART_PL011_IMSC_DSRMIM (1 << 3)
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#define UART_PL011_IMSC_DCDMIM (1 << 2)
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#define UART_PL011_IMSC_CTSMIM (1 << 1)
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#define UART_PL011_IMSC_RIMIM (1 << 0)
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