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7ccaa31380
A previous series already update STMicroelectronics emails maintainers but some files have been omitted (Makefile, .dts, .dtsi and .rst files). Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
75 lines
1.3 KiB
Text
75 lines
1.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Copyright 2017 - Patrice Chotard <patrice.chotard@foss.st.com>
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*
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*/
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/dts-v1/;
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#include "stm32h743.dtsi"
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#include "stm32h743-pinctrl.dtsi"
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/ {
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model = "STMicroelectronics STM32H743i-Discovery board";
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compatible = "st,stm32h743i-disco", "st,stm32h743";
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chosen {
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bootargs = "root=/dev/ram";
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stdout-path = "serial0:115200n8";
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};
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memory@d0000000 {
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device_type = "memory";
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reg = <0xd0000000 0x2000000>;
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};
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aliases {
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serial0 = &usart2;
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};
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v3v3: regulator-v3v3 {
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compatible = "regulator-fixed";
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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&clk_hse {
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clock-frequency = <25000000>;
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};
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&mac {
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status = "disabled";
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pinctrl-0 = <ðernet_rmii>;
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pinctrl-names = "default";
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phy-mode = "rmii";
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phy-handle = <&phy0>;
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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&sdmmc1 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc1_b4_pins_a>;
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pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
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broken-cd;
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st,neg-edge;
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bus-width = <4>;
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vmmc-supply = <&v3v3>;
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status = "okay";
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};
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&usart2 {
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pinctrl-0 = <&usart2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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