mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 02:33:07 +00:00
e3aafef4cf
This adds platform code and the device tree for the Phytium Durian Board. The initial support comprises the UART and the PCIE. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
33 lines
741 B
Text
33 lines
741 B
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2019, Phytium Ltd.
|
|
* shuyiqi <shuyiqi@phytium.com.cn>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
/ {
|
|
model = "Phytium Durian";
|
|
compatible = "phytium,durian";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
|
|
pcie-controller@40000000 {
|
|
compatible = "phytium,pcie-host-1.0";
|
|
device_type = "pci";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
reg = <0x0 0x40000000 0x0 0x10000000>;
|
|
bus-range = <0x0 0xff>;
|
|
ranges = <0x1000000 0x0 0x0 0x0 0x50000000 0x0 0xF00000>,
|
|
<0x2000000 0x0 0x58000000 0x0 0x58000000 0x0 0x28000000>,
|
|
<0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
|
|
};
|
|
|
|
uart@28001000 {
|
|
compatible = "arm,pl011";
|
|
reg = <0x0 0x28001000 0x0 0x1000>;
|
|
clock = <48000000>;
|
|
};
|
|
};
|
|
|