mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 17:07:38 +00:00
211b3d7263
This is a collection of all the whitespace, renames, comment, and other changes that should not change the DT functionality from Linux v6.3-rc6. Signed-off-by: Andrew Davis <afd@ti.com>
576 lines
15 KiB
Text
576 lines
15 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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* Copyright (C) 2018 Robert Bosch Power Tools GmbH
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "Bosch AM335x Guardian";
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compatible = "bosch,am335x-guardian", "ti,am33xx";
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer2;
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};
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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guardian_buttons: gpio-keys {
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pinctrl-names = "default";
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pinctrl-0 = <&guardian_button_pins>;
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compatible = "gpio-keys";
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select-button {
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label = "guardian-select-button";
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linux,code = <KEY_5>;
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gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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power-button {
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label = "guardian-power-button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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guardian_leds: gpio-leds {
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pinctrl-names = "default";
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pinctrl-0 = <&guardian_led_pins>;
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compatible = "gpio-leds";
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life-led {
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label = "guardian:life-led";
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gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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default-state = "on";
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};
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};
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panel {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
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pinctrl-1 = <&lcd_pins_sleep>;
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display-timings {
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320x240 {
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hactive = <320>;
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vactive = <240>;
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hback-porch = <68>;
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hfront-porch = <20>;
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hsync-len = <1>;
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vback-porch = <18>;
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vfront-porch = <4>;
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vsync-len = <1>;
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clock-frequency = <9000000>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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bus-width = <16>;
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fdd = <0x80>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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};
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};
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pwm7: pwm-7 {
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compatible = "ti,omap-dmtimer-pwm";
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ti,timers = <&timer7>;
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pinctrl-names = "default";
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pinctrl-0 = <&dmtimer7_pins>;
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};
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vmmcsd_fixed: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&cppi41dma {
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status = "okay";
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};
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&elm {
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status = "okay";
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};
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&gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins>;
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ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
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status = "okay";
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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ti,nand-ecc-opt = "bch16";
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ti,elm-id = <&elm>;
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nand-bus-width = <8>;
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <30>;
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gpmc,cs-wr-off-ns = <30>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <30>;
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gpmc,adv-wr-off-ns = <30>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <15>;
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gpmc,oe-on-ns = <1>;
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gpmc,oe-off-ns = <15>;
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gpmc,access-ns = <30>;
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gpmc,rd-cycle-ns = <30>;
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gpmc,wr-cycle-ns = <30>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <0>;
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gpmc,wr-data-mux-bus-ns = <0>;
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/*
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* MTD partition table
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*
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* All SPL-* partitions are sized to minimal length which can
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* be independently programmable. For NAND flash this is equal
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* to size of erase-block.
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SPL";
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reg = <0x0 0x40000>;
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};
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partition@1 {
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label = "SPL.backup1";
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reg = <0x40000 0x40000>;
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};
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partition@2 {
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label = "SPL.backup2";
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reg = <0x80000 0x40000>;
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};
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partition@3 {
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label = "SPL.backup3";
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reg = <0xc0000 0x40000>;
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};
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partition@4 {
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label = "u-boot";
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reg = <0x100000 0x100000>;
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};
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partition@5 {
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label = "u-boot.backup1";
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reg = <0x200000 0x100000>;
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};
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partition@6 {
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label = "u-boot-2";
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reg = <0x300000 0x100000>;
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};
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partition@7 {
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label = "u-boot-2.backup1";
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reg = <0x400000 0x100000>;
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};
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partition@8 {
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label = "u-boot-env";
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reg = <0x500000 0x40000>;
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};
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partition@9 {
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label = "u-boot-env.backup1";
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reg = <0x540000 0x40000>;
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};
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partition@10 {
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label = "splash-screen";
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reg = <0x580000 0x40000>;
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};
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partition@11 {
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label = "UBI";
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reg = <0x5c0000 0x1fa40000>;
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};
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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clock-frequency = <400000>;
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status = "okay";
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tps: tps@24 {
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reg = <0x24>;
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};
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};
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&lcdc {
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blue-and-red-wiring = "crossed";
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status = "okay";
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port {
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lcdc_0: endpoint@0 {
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remote-endpoint = <0>;
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};
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};
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};
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&mmc1 {
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bus-width = <0x4>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&vmmcsd_fixed>;
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status = "okay";
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};
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&rtc {
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clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
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clock-names = "ext-clk", "int-clk";
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system-power-controller;
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};
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&spi0 {
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ti,pindir-d0-out-d1-in;
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>;
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status = "okay";
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};
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/include/ "tps65217.dtsi"
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&tps {
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ti,pmic-shutdown-controller;
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interrupt-parent = <&intc>;
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interrupts = <7>; /* NMI */
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backlight {
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isel = <1>; /* 1 - ISET1, 2 ISET2 */
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fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
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default-brightness = <100>;
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};
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regulators {
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dcdc1_reg: regulator@0 {
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regulator-name = "vdds_dpr";
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regulator-always-on;
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};
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dcdc2_reg: regulator@1 {
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1351500>;
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regulator-boot-on;
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regulator-always-on;
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};
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dcdc3_reg: regulator@2 {
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regulator-name = "vdd_core";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: regulator@3 {
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regulator-name = "vio,vrtc,vdds";
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regulator-always-on;
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};
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ldo2_reg: regulator@4 {
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regulator-name = "vdd_3v3aux";
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regulator-always-on;
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};
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ldo3_reg: regulator@5 {
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regulator-name = "vdd_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo4_reg: regulator@6 {
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regulator-name = "vdd_3v3a";
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regulator-always-on;
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};
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};
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};
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&tscadc {
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status = "okay";
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adc {
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ti,adc-channels = <0 1 2 3 4 5 6>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb0 {
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dr_mode = "peripheral";
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb1 {
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dr_mode = "host";
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
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>;
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};
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dmtimer7_pins: pinmux_dmtimer7_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE5)
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>;
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};
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guardian_button_pins: pinmux_gpio_keys_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT, MUX_MODE7)
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>;
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};
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guardian_interface_pins: pinmux_guardian_interface_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLUP, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_OUTPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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lcd_disen_pins: pinmux_lcd_disen_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF
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(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW, MUX_MODE7)
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>;
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};
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lcd_pins_default: pinmux_lcd_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE1)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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AM33XX_PADCONF
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(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT | SLEWCTRL_SLOW, MUX_MODE0)
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>;
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};
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lcd_pins_sleep: pinmux_lcd_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA0, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA1, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA2, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA3, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA4, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA5, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA6, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA7, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA8, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA9, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA10, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA11, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA12, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA13, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA14, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_DATA15, PULL_DISABLE | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
|
|
AM33XX_PADCONF
|
|
(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW, MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
guardian_led_pins: pinmux_leds_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_OUTPUT, MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
mmc1_pins: pinmux_mmc1_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
spi0_pins: pinmux_spi0_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT_PULLUP, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
uart0_pins: pinmux_uart0_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
|
>;
|
|
};
|
|
|
|
uart2_pins: pinmux_uart2_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)
|
|
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
|
|
>;
|
|
};
|
|
|
|
nandflash_pins: pinmux_nandflash_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
|
|
>;
|
|
};
|
|
};
|