u-boot/arch/arm/mach-aspeed/ast2600
Chia-Wei Wang 442a69c143 configs: ast2600: Move SPL bss section to DRAM space
The commit b583348ca8 ("image: fit: Align hash output buffers") places
the hash output buffer at the .bss section. However, AST2600 by default
executes SPL in the NOR flash XIP way. This results in the hash output
cannot be written to the buffer as it is located at the R/X only region.

We need to move the .bss section out of the SPL body to the DRAM space,
where hash output can be written to. This patch includes:
 - Define the .bss section base and size
 - A new SPL linker script is added with a separate .bss region specified
 - Enable CONFIG_SPL_SEPARATE_BSS kconfig option

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Neal Liu <neal_liu@aspeedtech.com>
2022-06-22 21:30:05 -04:00
..
board_common.c common: Drop asm/global_data.h from common header 2021-02-02 15:33:42 -05:00
Kconfig aspeed: Add AST2600 platform support 2021-01-18 15:23:06 -05:00
lowlevel_init.S aspeed: Add AST2600 platform support 2021-01-18 15:23:06 -05:00
Makefile aspeed: Add AST2600 platform support 2021-01-18 15:23:06 -05:00
spl.c ast2600: spl: Locate load buffer in DRAM space 2021-11-17 17:05:00 -05:00
u-boot-spl.lds configs: ast2600: Move SPL bss section to DRAM space 2022-06-22 21:30:05 -04:00