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https://github.com/AsahiLinux/u-boot
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440c00de69
This converts the following to Kconfig: CONFIG_SYS_KWD_CONFIG Signed-off-by: Tom Rini <trini@konsulko.com>
81 lines
2.3 KiB
C
81 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Lei Wen <leiwen@marvell.com>
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*/
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/*
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* This file should be included in board config header file.
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*
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* It supports common definitions for Kirkwood platform
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*/
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#ifndef _KW_CONFIG_H
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#define _KW_CONFIG_H
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#if defined (CONFIG_KW88F6281)
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#include <asm/arch/kw88f6281.h>
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#elif defined (CONFIG_KW88F6192)
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#include <asm/arch/kw88f6192.h>
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#else
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#error "SOC Name not defined"
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#endif /* CONFIG_KW88F6281 */
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#include <asm/arch/soc.h>
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#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
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#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
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#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
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/* Kirkwood has 2k of Security SRAM, use it for SP */
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#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
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#define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE
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#define MV_UART_CONSOLE_BASE KW_UART0_BASE
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#define MV_SATA_BASE KW_SATA_BASE
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#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
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#define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET
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/*
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* NAND configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_KIRKWOOD
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#define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */
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#define NAND_ALLOW_ERASE_ALL 1
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#endif
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/*
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* Ethernet Driver configuration
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
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#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
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#endif /* CONFIG_CMD_NET */
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/*
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* IDE Support on SATA ports
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*/
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#ifdef CONFIG_IDE
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#define __io
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/* Data, registers and alternate blocks are at the same offset */
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#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
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#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
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/* Each 8-bit ATA register is aligned to a 4-bytes address */
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#define CONFIG_SYS_ATA_STRIDE 4
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/* Controller supports 48-bits LBA addressing */
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#define CONFIG_LBA48
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/* CONFIG_IDE requires some #defines for ATA registers */
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#define CONFIG_SYS_IDE_MAXBUS 2
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#define CONFIG_SYS_IDE_MAXDEVICE 2
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/* ATA registers base is at SATA controller base */
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#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
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#endif /* CONFIG_IDE */
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/* Use common timer */
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
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#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TCLK
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#endif /* _KW_CONFIG_H */
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