mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 01:38:22 +00:00
2cc195e0a5
commit 25ddd1fb0a left remnants of
many comments about CONFIG_SYS_GBL_DATA_SIZE.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
333 lines
9.8 KiB
C
333 lines
9.8 KiB
C
/*
|
|
* am3517_evm.h - Default configuration for AM3517 EVM board.
|
|
*
|
|
* Author: Vaibhav Hiremath <hvaibhav@ti.com>
|
|
*
|
|
* Based on omap3_evm_config.h
|
|
*
|
|
* Copyright (C) 2010 Texas Instruments Incorporated
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
/*
|
|
* High Level Configuration Options
|
|
*/
|
|
#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
|
|
#define CONFIG_OMAP 1 /* in a TI OMAP core */
|
|
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
|
|
#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
|
|
|
|
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
|
|
|
|
#include <asm/arch/cpu.h> /* get chip and board defs */
|
|
#include <asm/arch/omap3.h>
|
|
|
|
/*
|
|
* Display CPU and Board information
|
|
*/
|
|
#define CONFIG_DISPLAY_CPUINFO 1
|
|
#define CONFIG_DISPLAY_BOARDINFO 1
|
|
|
|
/* Clock Defines */
|
|
#define V_OSCK 26000000 /* Clock output from T2 */
|
|
#define V_SCLK (V_OSCK >> 1)
|
|
|
|
#undef CONFIG_USE_IRQ /* no support for IRQs */
|
|
#define CONFIG_MISC_INIT_R
|
|
|
|
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
|
#define CONFIG_SETUP_MEMORY_TAGS 1
|
|
#define CONFIG_INITRD_TAG 1
|
|
#define CONFIG_REVISION_TAG 1
|
|
|
|
/*
|
|
* Size of malloc() pool
|
|
*/
|
|
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
|
|
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
|
|
/*
|
|
* DDR related
|
|
*/
|
|
#define CONFIG_OMAP3_MICRON_DDR 1 /* Micron DDR */
|
|
#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
|
|
|
|
/*
|
|
* Hardware drivers
|
|
*/
|
|
|
|
/*
|
|
* NS16550 Configuration
|
|
*/
|
|
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
|
|
|
|
#define CONFIG_SYS_NS16550
|
|
#define CONFIG_SYS_NS16550_SERIAL
|
|
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
|
|
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
|
|
|
|
/*
|
|
* select serial console configuration
|
|
*/
|
|
#define CONFIG_CONS_INDEX 3
|
|
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
|
|
#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
|
|
|
|
/* allow to overwrite serial and ethaddr */
|
|
#define CONFIG_ENV_OVERWRITE
|
|
#define CONFIG_BAUDRATE 115200
|
|
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
|
|
115200}
|
|
#define CONFIG_MMC 1
|
|
#define CONFIG_OMAP3_MMC 1
|
|
#define CONFIG_DOS_PARTITION 1
|
|
|
|
/*
|
|
* USB configuration
|
|
* Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
|
|
* Enable CONFIG_MUSB_UDC for Device functionalities.
|
|
*/
|
|
#define CONFIG_USB_AM35X 1
|
|
#define CONFIG_MUSB_HCD 1
|
|
|
|
#ifdef CONFIG_USB_AM35X
|
|
|
|
#ifdef CONFIG_MUSB_HCD
|
|
#define CONFIG_CMD_USB
|
|
|
|
#define CONFIG_USB_STORAGE
|
|
#define CONGIG_CMD_STORAGE
|
|
#define CONFIG_CMD_FAT
|
|
|
|
#ifdef CONFIG_USB_KEYBOARD
|
|
#define CONFIG_SYS_USB_EVENT_POLL
|
|
#define CONFIG_PREBOOT "usb start"
|
|
#endif /* CONFIG_USB_KEYBOARD */
|
|
|
|
#endif /* CONFIG_MUSB_HCD */
|
|
|
|
#ifdef CONFIG_MUSB_UDC
|
|
/* USB device configuration */
|
|
#define CONFIG_USB_DEVICE 1
|
|
#define CONFIG_USB_TTY 1
|
|
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
|
|
/* Change these to suit your needs */
|
|
#define CONFIG_USBD_VENDORID 0x0451
|
|
#define CONFIG_USBD_PRODUCTID 0x5678
|
|
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
|
|
#define CONFIG_USBD_PRODUCT_NAME "AM3517EVM"
|
|
#endif /* CONFIG_MUSB_UDC */
|
|
|
|
#endif /* CONFIG_USB_AM35X */
|
|
|
|
/* commands to include */
|
|
#include <config_cmd_default.h>
|
|
|
|
#define CONFIG_CMD_EXT2 /* EXT2 Support */
|
|
#define CONFIG_CMD_FAT /* FAT support */
|
|
#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
|
|
|
|
#define CONFIG_CMD_I2C /* I2C serial bus support */
|
|
#define CONFIG_CMD_MMC /* MMC support */
|
|
#define CONFIG_CMD_NAND /* NAND support */
|
|
#define CONFIG_CMD_DHCP
|
|
#define CONFIG_CMD_PING
|
|
|
|
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
|
|
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
|
|
#undef CONFIG_CMD_IMI /* iminfo */
|
|
#undef CONFIG_CMD_IMLS /* List all found images */
|
|
|
|
#define CONFIG_SYS_NO_FLASH
|
|
#define CONFIG_HARD_I2C 1
|
|
#define CONFIG_SYS_I2C_SPEED 100000
|
|
#define CONFIG_SYS_I2C_SLAVE 1
|
|
#define CONFIG_SYS_I2C_BUS 0
|
|
#define CONFIG_SYS_I2C_BUS_SELECT 1
|
|
#define CONFIG_DRIVER_OMAP34XX_I2C 1
|
|
|
|
#undef CONFIG_CMD_NET
|
|
#undef CONFIG_CMD_NFS
|
|
/*
|
|
* Board NAND Info.
|
|
*/
|
|
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
|
|
/* to access nand */
|
|
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
|
|
/* to access */
|
|
/* nand at CS0 */
|
|
|
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
|
|
/* NAND devices */
|
|
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
|
|
|
|
#define CONFIG_JFFS2_NAND
|
|
/* nand device jffs2 lives on */
|
|
#define CONFIG_JFFS2_DEV "nand0"
|
|
/* start of jffs2 partition */
|
|
#define CONFIG_JFFS2_PART_OFFSET 0x680000
|
|
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
|
|
|
|
/* Environment information */
|
|
#define CONFIG_BOOTDELAY 10
|
|
|
|
#define CONFIG_BOOTFILE uImage
|
|
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
"loadaddr=0x82000000\0" \
|
|
"console=ttyS2,115200n8\0" \
|
|
"mmcargs=setenv bootargs console=${console} " \
|
|
"root=/dev/mmcblk0p2 rw " \
|
|
"rootfstype=ext3 rootwait\0" \
|
|
"nandargs=setenv bootargs console=${console} " \
|
|
"root=/dev/mtdblock4 rw " \
|
|
"rootfstype=jffs2\0" \
|
|
"loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
|
|
"bootscript=echo Running bootscript from mmc ...; " \
|
|
"source ${loadaddr}\0" \
|
|
"loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
|
|
"mmcboot=echo Booting from mmc ...; " \
|
|
"run mmcargs; " \
|
|
"bootm ${loadaddr}\0" \
|
|
"nandboot=echo Booting from nand ...; " \
|
|
"run nandargs; " \
|
|
"nand read ${loadaddr} 280000 400000; " \
|
|
"bootm ${loadaddr}\0" \
|
|
|
|
#define CONFIG_BOOTCOMMAND \
|
|
"if mmc init; then " \
|
|
"if run loadbootscript; then " \
|
|
"run bootscript; " \
|
|
"else " \
|
|
"if run loaduimage; then " \
|
|
"run mmcboot; " \
|
|
"else run nandboot; " \
|
|
"fi; " \
|
|
"fi; " \
|
|
"else run nandboot; fi"
|
|
|
|
#define CONFIG_AUTO_COMPLETE 1
|
|
/*
|
|
* Miscellaneous configurable options
|
|
*/
|
|
#define V_PROMPT "AM3517_EVM # "
|
|
|
|
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
|
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
|
#define CONFIG_SYS_PROMPT V_PROMPT
|
|
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
|
/* Print Buffer Size */
|
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
|
sizeof(CONFIG_SYS_PROMPT) + 16)
|
|
#define CONFIG_SYS_MAXARGS 32 /* max number of command */
|
|
/* args */
|
|
/* Boot Argument Buffer Size */
|
|
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
|
|
/* memtest works on */
|
|
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
|
|
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
|
|
0x01F00000) /* 31MB */
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
|
|
/* address */
|
|
|
|
/*
|
|
* AM3517 has 12 GP timers, they can be driven by the system clock
|
|
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
|
|
* This rate is divided by a local divisor.
|
|
*/
|
|
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
|
|
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
|
#define CONFIG_SYS_HZ 1000
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Stack sizes
|
|
*
|
|
* The stack sizes are set up in start.S using the settings below
|
|
*/
|
|
#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
|
|
#ifdef CONFIG_USE_IRQ
|
|
#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
|
|
#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
|
|
#endif
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Physical Memory Map
|
|
*/
|
|
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
|
|
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
|
|
#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
|
|
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
|
|
|
|
/* SDRAM Bank Allocation method */
|
|
#define SDRC_R_B_C 1
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* FLASH and environment organization
|
|
*/
|
|
|
|
/* **** PISMO SUPPORT *** */
|
|
|
|
/* Configure the PISMO */
|
|
#define PISMO1_NAND_SIZE GPMC_SIZE_128M
|
|
#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
|
|
|
|
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
|
|
/* on one chip */
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
|
|
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
|
|
|
|
#if defined(CONFIG_CMD_NAND)
|
|
#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
|
|
#endif
|
|
|
|
/* Monitor at start of flash */
|
|
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
|
|
|
#define CONFIG_NAND_OMAP_GPMC
|
|
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
|
|
#define CONFIG_ENV_IS_IN_NAND 1
|
|
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
|
|
|
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
|
|
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
|
|
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* CFI FLASH driver setup
|
|
*/
|
|
/* timeout values are in ticks */
|
|
#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
|
|
#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
|
|
|
|
/* Flash banks JFFS2 should use */
|
|
#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
|
|
CONFIG_SYS_MAX_NAND_DEVICE)
|
|
#define CONFIG_SYS_JFFS2_MEM_NAND
|
|
/* use flash_info[2] */
|
|
#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
|
|
#define CONFIG_SYS_JFFS2_NUM_BANKS 1
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
|
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
|
|
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
|
|
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
|
|
CONFIG_SYS_INIT_RAM_SIZE - \
|
|
GENERATED_GBL_DATA_SIZE)
|
|
#endif /* __CONFIG_H */
|