mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
9f0a371d2c
Hawkboard was using the wrong nand_read_page version for SPL image. As a side effect, the u-boot image loaded by the SPL from nand was getting corrupted. Enable CONFIG_SYS_NAND_HW_ECC_OOBFIRST to select the correct nand_read_page algorithm for SPL. Signed-off-by: Linu Cherian <linucherian@gmail.com> Acked-by: Sughosh Ganu <urwithsughosh@gmail.com> Acked-by: Tom Rini <trini@ti.com>
220 lines
6.6 KiB
C
220 lines
6.6 KiB
C
/*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on davinci_dvevm.h. Original Copyrights follow:
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Board
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*/
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#define CONFIG_SYS_USE_NAND 1
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/*
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* SoC Configuration
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*/
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#define CONFIG_MACH_DAVINCI_HAWK
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#define CONFIG_ARM926EJS /* arm926ejs CPU core */
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#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
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#define CONFIG_SOC_DA850 /* TI DA850 SoC */
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#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
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#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
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#define CONFIG_SYS_OSCIN_FREQ 24000000
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#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
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#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
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DAVINCI_SYSCFG_SUSPSRC_EMAC | \
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DAVINCI_SYSCFG_SUSPSRC_I2C | \
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DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
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DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
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DAVINCI_SYSCFG_SUSPSRC_UART2)
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#if defined(CONFIG_UART_U_BOOT)
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#define CONFIG_SYS_TEXT_BASE 0xc1080000
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#elif !defined(CONFIG_SPL_BUILD)
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#define CONFIG_SYS_TEXT_BASE 0xc1180000
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#endif
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/* Spl */
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#define CONFIG_SPL
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_NAND_LOAD
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#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
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#define CONFIG_SPL_TEXT_BASE 0xc1080000
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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/*
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* Memory Info
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*/
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#define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
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#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
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#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
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#define CONFIG_SYS_SDRAM_BASE 0xc0000000
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#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
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GENERATED_GBL_DATA_SIZE)
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/* memtest start addr */
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#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
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/* memtest will be run on 16MB */
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define CONFIG_STACKSIZE (256*1024) /* regular stack */
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/*
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* Serial Driver info
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
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#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/*
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* Network & Ethernet Configuration
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*/
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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/*
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* Nand Flash
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*/
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#ifdef CONFIG_SYS_USE_NAND
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE (128 << 10)
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#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
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#define CONFIG_CLE_MASK 0x10
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#define CONFIG_ALE_MASK 0x8
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
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#define CFG_DAVINCI_STD_NAND_LAYOUT
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#define CONFIG_SYS_NAND_CS 3
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#define CONFIG_SYS_NAND_PAGE_2K
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/* Max number of NAND devices */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
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/* Block 0--not used by bootcode */
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#define CONFIG_ENV_OFFSET 0x0
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#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000
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#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
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CONFIG_SYS_NAND_U_BOOT_SIZE - \
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CONFIG_SYS_MALLOC_LEN - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_NAND_ECCPOS { \
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24, 25, 26, 27, 28, \
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29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
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39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
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49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
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59, 60, 61, 62, 63 }
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 10
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#endif /* CONFIG_SYS_USE_NAND */
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/*
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* U-Boot general configuration
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*/
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#define CONFIG_MISC_INIT_R
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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#define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/*
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* Linux Information
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*/
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#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTARGS \
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"mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
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"4M ip=static"
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#define CONFIG_BOOTDELAY 3
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/*
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* U-Boot commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVES
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#define CONFIG_CMD_MEMORY
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#ifdef CONFIG_CMD_BDI
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#define CONFIG_CLOCKS
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#endif
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#ifdef CONFIG_SYS_USE_NAND
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_NAND
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#endif
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#ifndef CONFIG_DRIVER_TI_EMAC
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_DHCP
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#undef CONFIG_CMD_MII
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#undef CONFIG_CMD_PING
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#endif
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#endif /* __CONFIG_H */
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