mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 05:42:58 +00:00
1410cba567
Drop legacy nfsboot script in favor of distroboot DHCP boot. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
108 lines
3.1 KiB
C
108 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2020-2021 Toradex
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*/
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#ifndef __VERDIN_IMX8MM_H
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#define __VERDIN_IMX8MM_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#define CONFIG_SPL_MAX_SIZE (148 * 1024)
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_STACK 0x920000
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#define CONFIG_SPL_BSS_START_ADDR 0x910000
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#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CONFIG_MALLOC_F_ADDR 0x930000
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/* For RAW image gives a error info not panic */
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#endif
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#define MEM_LAYOUT_ENV_SETTINGS \
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"fdt_addr_r=0x44000000\0" \
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"kernel_addr_r=0x42000000\0" \
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"ramdisk_addr_r=0x46400000\0" \
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"scriptaddr=0x46000000\0"
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/* Enable Distro Boot */
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#ifndef CONFIG_SPL_BUILD
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#else
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#define BOOTENV
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#endif
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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"bootcmd_mfg=fastboot 0\0" \
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"boot_file=Image\0" \
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"boot_script_dhcp=boot.scr\0" \
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"console=ttymxc0\0" \
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"fdt_addr=0x43000000\0" \
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"fdt_board=dev\0" \
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"initrd_addr=0x43800000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"setup=setenv setupargs console=${console},${baudrate} " \
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"console=tty1 consoleblank=0 earlycon\0" \
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"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
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"if test \"$confirm\" = \"y\"; then " \
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"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
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"${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
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"${blkcnt}; fi\0"
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#if defined(CONFIG_ENV_IS_IN_MMC)
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/* Environment in eMMC, before config block at the end of 1st "boot sector" */
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#endif
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* SDRAM configuration */
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
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/* UART */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* ENET */
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#define CONFIG_FEC_MXC_PHYADDR 7
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#define FEC_QUIRK_ENET_MAC
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif /* __VERDIN_IMX8MM_H */
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