u-boot/drivers/clk/aspeed
maxims@google.com d5ce357461 aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
Fix H-PLL and M-PLL rate calculation in ast2500 clock driver.
Without this fix, valid setting can lead to division by zero
when requesting the rate of H-PLL or M-PLL clocks.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-02-08 15:56:30 -05:00
..
clk_ast2500.c aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation 2017-02-08 15:56:30 -05:00
Makefile aspeed: Add basic ast2500-specific drivers and configuration 2017-01-28 14:04:29 -05:00