mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 22:24:32 +00:00
e985eb14ac
This converts the following to Kconfig: CONFIG_CMD_ASKENV CONFIG_CMD_BMP CONFIG_CMD_BOOTD CONFIG_CMD_CACHE CONFIG_CMD_CRC32 CONFIG_CMD_DHCP CONFIG_CMD_ENV CONFIG_CMD_EXPORTENV CONFIG_CMD_EXT2 CONFIG_CMD_EXT4 CONFIG_CMD_FLASH CONFIG_CMD_FS_GENERIC CONFIG_CMD_FUSE CONFIG_CMD_GPIO CONFIG_CMD_GPT CONFIG_CMD_GREPENV CONFIG_CMD_I2C CONFIG_CMD_IMLS CONFIG_CMD_IMPORTENV CONFIG_CMD_LOADB CONFIG_CMD_LOADS CONFIG_CMD_MEMINFO CONFIG_CMD_MII CONFIG_CMD_MTDPARTS CONFIG_CMD_NAND CONFIG_CMD_NAND_TRIMFFS CONFIG_CMD_NFS CONFIG_CMD_PCA953X CONFIG_CMD_PCA953X_INFO CONFIG_CMD_PCI CONFIG_CMD_PING CONFIG_CMD_READ CONFIG_CMD_SF CONFIG_CMD_SPI CONFIG_CMD_SPL CONFIG_CMD_SPL_WRITE_SIZE CONFIG_CMD_TIME CONFIG_CMD_TRACE CONFIG_CMD_UBI CONFIG_CMD_UBIFS CONFIG_CMD_UNZIP CONFIG_FS_EXT4 Signed-off-by: Tom Rini <trini@konsulko.com>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
|
|
*/
|
|
|
|
#ifndef _CONFIG_DB_MV7846MP_GP_H
|
|
#define _CONFIG_DB_MV7846MP_GP_H
|
|
|
|
/*
|
|
* High Level Configuration Options (easy to change)
|
|
*/
|
|
|
|
/*
|
|
* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
|
|
* for DDR ECC byte filling in the SPL before loading the main
|
|
* U-Boot into it.
|
|
*/
|
|
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
|
|
|
/* I2C */
|
|
#define CONFIG_SYS_I2C
|
|
#define CONFIG_SYS_I2C_MVTWSI
|
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
|
#define CONFIG_SYS_I2C_SPEED 100000
|
|
|
|
/* SPI NOR flash default params, used by sf commands */
|
|
|
|
/* Environment in SPI NOR flash */
|
|
|
|
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
|
|
|
|
/*
|
|
* mv-common.h should be defined after CMD configs since it used them
|
|
* to enable certain macros
|
|
*/
|
|
#include "mv-common.h"
|
|
|
|
/*
|
|
* Memory layout while starting into the bin_hdr via the
|
|
* BootROM:
|
|
*
|
|
* 0x4000.4000 - 0x4003.4000 headers space (192KiB)
|
|
* 0x4000.4030 bin_hdr start address
|
|
* 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
|
|
* 0x4007.fffc BootROM stack top
|
|
*
|
|
* The address space between 0x4007.fffc and 0x400f.fff is not locked in
|
|
* L2 cache thus cannot be used.
|
|
*/
|
|
|
|
/* SPL */
|
|
/* Defines for SPL */
|
|
#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
|
|
|
|
#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
|
|
#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
#define CONFIG_SYS_MALLOC_SIMPLE
|
|
#endif
|
|
|
|
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
|
|
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
|
|
|
|
/* SPL related SPI defines */
|
|
|
|
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
|
|
#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
|
|
#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
|
|
|
|
#endif /* _CONFIG_DB_MV7846MP_GP_H */
|