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e08539b791
Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
149 lines
2.8 KiB
C
149 lines
2.8 KiB
C
/*
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* Atheros AR71XX/AR724X/AR913X common definitions
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*
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* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_MACH_ATH79_H
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#define __ASM_MACH_ATH79_H
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#include <linux/types.h>
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DECLARE_GLOBAL_DATA_PTR;
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enum ath79_soc_type {
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ATH79_SOC_UNKNOWN,
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ATH79_SOC_AR7130,
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ATH79_SOC_AR7141,
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ATH79_SOC_AR7161,
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ATH79_SOC_AR7240,
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ATH79_SOC_AR7241,
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ATH79_SOC_AR7242,
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ATH79_SOC_AR9130,
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ATH79_SOC_AR9132,
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ATH79_SOC_AR9330,
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ATH79_SOC_AR9331,
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ATH79_SOC_AR9341,
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ATH79_SOC_AR9342,
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ATH79_SOC_AR9344,
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ATH79_SOC_QCA9533,
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ATH79_SOC_QCA9556,
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ATH79_SOC_QCA9558,
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ATH79_SOC_TP9343,
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ATH79_SOC_QCA9561,
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};
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static inline int soc_is_ar71xx(void)
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{
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return gd->arch.soc == ATH79_SOC_AR7130 ||
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gd->arch.soc == ATH79_SOC_AR7141 ||
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gd->arch.soc == ATH79_SOC_AR7161;
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}
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static inline int soc_is_ar724x(void)
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{
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return gd->arch.soc == ATH79_SOC_AR7240 ||
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gd->arch.soc == ATH79_SOC_AR7241 ||
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gd->arch.soc == ATH79_SOC_AR7242;
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}
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static inline int soc_is_ar7240(void)
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{
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return gd->arch.soc == ATH79_SOC_AR7240;
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}
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static inline int soc_is_ar7241(void)
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{
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return gd->arch.soc == ATH79_SOC_AR7241;
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}
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static inline int soc_is_ar7242(void)
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{
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return gd->arch.soc == ATH79_SOC_AR7242;
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}
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static inline int soc_is_ar913x(void)
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{
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return gd->arch.soc == ATH79_SOC_AR9130 ||
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gd->arch.soc == ATH79_SOC_AR9132;
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}
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static inline int soc_is_ar933x(void)
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{
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return gd->arch.soc == ATH79_SOC_AR9330 ||
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gd->arch.soc == ATH79_SOC_AR9331;
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}
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static inline int soc_is_ar9341(void)
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{
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return gd->arch.soc == ATH79_SOC_AR9341;
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}
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static inline int soc_is_ar9342(void)
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{
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return gd->arch.soc == ATH79_SOC_AR9342;
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}
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static inline int soc_is_ar9344(void)
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{
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return gd->arch.soc == ATH79_SOC_AR9344;
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}
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static inline int soc_is_ar934x(void)
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{
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return soc_is_ar9341() ||
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soc_is_ar9342() ||
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soc_is_ar9344();
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}
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static inline int soc_is_qca9533(void)
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{
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return gd->arch.soc == ATH79_SOC_QCA9533;
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}
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static inline int soc_is_qca953x(void)
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{
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return soc_is_qca9533();
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}
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static inline int soc_is_qca9556(void)
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{
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return gd->arch.soc == ATH79_SOC_QCA9556;
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}
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static inline int soc_is_qca9558(void)
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{
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return gd->arch.soc == ATH79_SOC_QCA9558;
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}
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static inline int soc_is_qca955x(void)
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{
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return soc_is_qca9556() || soc_is_qca9558();
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}
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static inline int soc_is_tp9343(void)
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{
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return gd->arch.soc == ATH79_SOC_TP9343;
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}
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static inline int soc_is_qca9561(void)
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{
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return gd->arch.soc == ATH79_SOC_QCA9561;
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}
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static inline int soc_is_qca956x(void)
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{
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return soc_is_tp9343() || soc_is_qca9561();
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}
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int ath79_eth_reset(void);
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int ath79_usb_reset(void);
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void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
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void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz);
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#endif /* __ASM_MACH_ATH79_H */
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