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https://github.com/AsahiLinux/u-boot
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97bf082c9f
J7200 shares quite a few characteristics with J721E. However a few sets are different. Introduce a Kconfig to differentiate the two to allow for new boards to be introduced in a seamless manner. Signed-off-by: Nishanth Menon <nm@ti.com>
159 lines
4.6 KiB
Text
159 lines
4.6 KiB
Text
if ARCH_K3
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choice
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prompt "Texas Instruments' K3 based SoC select"
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optional
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config SOC_K3_AM654
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bool "TI's K3 based AM654 SoC Family Support"
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config SOC_K3_J721E
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bool "TI's K3 based J721E SoC Family Support"
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config SOC_K3_J721S2
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bool "TI's K3 based J721S2 SoC Family Support"
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config SOC_K3_AM642
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bool "TI's K3 based AM642 SoC Family Support"
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config SOC_K3_AM625
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bool "TI's K3 based AM625 SoC Family Support"
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config SOC_K3_AM62A7
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bool "TI's K3 based AM62A7 SoC Family Support"
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endchoice
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if SOC_K3_J721E
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config SOC_K3_J721E_J7200
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bool "TI's K3 based J7200 SoC variant Family Support"
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endif
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config SYS_SOC
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default "k3"
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config SYS_K3_NON_SECURE_MSRAM_SIZE
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hex
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default 0x80000 if SOC_K3_AM654
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default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
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default 0x1c0000 if SOC_K3_AM642
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default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
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help
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Describes the total size of the MCU or OCMC MSRAM present on
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the SoC in use. This doesn't specify the total size of SPL as
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ROM can use some part of this RAM. Once ROM gives control to
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SPL then this complete size can be usable.
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config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
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hex
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default 0x58000 if SOC_K3_AM654
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default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
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default 0x180000 if SOC_K3_AM642
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default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
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help
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Describes the maximum size of the image that ROM can download
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from any boot media.
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config SYS_K3_MCU_SCRATCHPAD_BASE
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hex
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default 0x40280000 if SOC_K3_AM654
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default 0x41cff9fc if SOC_K3_J721S2
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default 0x41cff9fc if SOC_K3_J721E
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help
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Describes the base address of MCU Scratchpad RAM.
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config SYS_K3_MCU_SCRATCHPAD_SIZE
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hex
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default 0x200 if SOC_K3_AM654
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default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
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help
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Describes the size of MCU Scratchpad RAM.
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config SYS_K3_BOOT_PARAM_TABLE_INDEX
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hex
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default 0x41c7fbfc if SOC_K3_AM654
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default 0x41cffbfc if SOC_K3_J721E
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default 0x41cfdbfc if SOC_K3_J721S2
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default 0x701bebfc if SOC_K3_AM642
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default 0x43c3f290 if SOC_K3_AM625
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default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
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default 0x7000f290 if SOC_K3_AM62A7 && ARM64
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help
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Address at which ROM stores the value which determines if SPL
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is booted up by primary boot media or secondary boot media.
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config SYS_K3_KEY
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string "Key used to generate x509 certificate"
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help
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This option enables to provide a custom key that can be used for
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generating x509 certificate for spl binary. If not needed leave
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it blank so that a random key is generated and used.
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config SYS_K3_BOOT_CORE_ID
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int
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default 16
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config K3_EARLY_CONS
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bool "Activate to allow for an early console during SPL"
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depends on SPL
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help
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Turn this option on to enable an early console functionality in SPL
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before the main console is being brought up. This can be useful in
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situations where the main console is dependent on System Firmware
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(SYSFW) being up and running, which is usually not the case during
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the very early stages of boot. Using this early console functionality
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will allow for an alternate serial port to be used to support things
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like UART-based boot and early diagnostic messages until the main
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console is ready to get activated.
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config K3_EARLY_CONS_IDX
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depends on K3_EARLY_CONS
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int "Index of serial device to use for SPL early console"
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default 1
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help
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Use this option to set the index of the serial device to be used
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for the early console during SPL execution.
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config SYS_K3_SPL_ATF
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bool "Start Cortex-A from SPL"
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depends on CPU_V7R
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help
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Enabling this will try to start Cortex-A (typically with ATF)
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after SPL from R5.
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config K3_ATF_LOAD_ADDR
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hex "Load address of ATF image"
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default 0x70000000
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help
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The load address for the ATF image. This value defaults to 0x70000000
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if not provided in the board defconfig file.
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config K3_DM_FW
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bool "Separate DM firmware image"
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depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
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default y
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help
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Enabling this will indicate that the system has separate DM
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and TIFS firmware images in place, instead of a single SYSFW
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firmware. Due to DM being executed on the same core as R5 SPL
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bootloader, it makes RM and PM services not being available
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during R5 SPL execution time.
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config K3_X509_SWRV
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int "SWRV for X509 certificate used for boot images"
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default 1
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help
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SWRV for X509 certificate used for boot images
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if CPU_V7R
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source "arch/arm/mach-k3/r5/Kconfig"
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endif
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source "arch/arm/mach-k3/am65x/Kconfig"
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source "arch/arm/mach-k3/am64x/Kconfig"
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source "arch/arm/mach-k3/am62x/Kconfig"
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source "arch/arm/mach-k3/am62ax/Kconfig"
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source "arch/arm/mach-k3/j721e/Kconfig"
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source "arch/arm/mach-k3/j721s2/Kconfig"
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endif
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