mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
08f1d58aff
With all boards now using DM_ETH we determine the value for CONFIG_FEC_XCV_TYPE at run time, except in the case of the default fall-back. Set the fallback directly now. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
85 lines
2.4 KiB
C
85 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017-2019 A. Karas, SomLabs
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* Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the SoMlabs VisionSOM 6ULL board.
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*/
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#ifndef __SOMLABS_VISIONSOM_6ULL_H
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#define __SOMLABS_VISIONSOM_6ULL_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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#include "mx6_common.h"
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#include <asm/mach-imx/gpio.h>
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/* SPL options */
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#include "imx6_spl.h"
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#ifdef CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#endif /* CONFIG_FSL_USDHC */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootm_size=0x10000000\0" \
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"console=ttymxc0\0" \
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"initrd_addr=0x86800000\0" \
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"fdt_addr=0x83000000\0" \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"splashimage=0x80000000\0" \
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"splashfile=/boot/splash.bmp\0" \
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"mmcdev=1\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk1p1 rootwait rw\0" \
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"setrootmmc=setenv rootspec root=${mmcroot}\0" \
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"setbootscriptmmc=setenv loadbootscript " \
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"load mmc ${mmcdev}:${mmcpart} " \
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"${loadaddr} /boot/${script};\0" \
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"setloadmmc=setenv loadimage load mmc ${mmcdev}:${mmcpart} " \
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"${loadaddr} /boot/${image}; " \
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"setenv loadfdt load mmc ${mmcdev}:${mmcpart} " \
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"${fdt_addr} /boot/${fdt_file};\0" \
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"setbootargs=setenv bootargs console=${console},${baudrate} " \
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"${rootspec}\0" \
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"execbootscript=echo Running bootscript...; source\0" \
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"setfdtfile=setenv fdt_file somlabs-visionsom-6ull.dtb\0" \
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"checkbootdev=run setbootscriptmmc; " \
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"run setrootmmc; " \
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"run setloadmmc; " \
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/* Miscellaneous configurable options */
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#ifdef CONFIG_CMD_NET
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1
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#endif
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#endif
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