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1335e7745f
Add support for operating a PHY attached to ehci-pci. There are systems where the EHCI controller is internally wired to a PCI bus and has a PHY connected to it as well, ie. the R-Car Gen2. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
176 lines
3.9 KiB
C
176 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*-
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* Copyright (c) 2007-2008, Juniper Networks, Inc.
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* All rights reserved.
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <pci.h>
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#include <usb.h>
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#include <asm/io.h>
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#include "ehci.h"
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/* Information about a USB port */
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struct ehci_pci_priv {
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struct ehci_ctrl ehci;
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struct phy phy;
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};
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#ifdef CONFIG_DM_USB
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static int ehci_pci_init(struct udevice *dev, struct ehci_hccr **ret_hccr,
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struct ehci_hcor **ret_hcor)
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{
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struct ehci_pci_priv *priv = dev_get_priv(dev);
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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int ret;
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u32 cmd;
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ret = ehci_setup_phy(dev, &priv->phy, 0);
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if (ret)
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return ret;
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hccr = (struct ehci_hccr *)dm_pci_map_bar(dev,
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PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
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hcor = (struct ehci_hcor *)((uintptr_t) hccr +
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HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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debug("EHCI-PCI init hccr %#lx and hcor %#lx hc_length %d\n",
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(ulong)hccr, (ulong)hcor,
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(u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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*ret_hccr = hccr;
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*ret_hcor = hcor;
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/* enable busmaster */
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dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_MASTER;
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dm_pci_write_config32(dev, PCI_COMMAND, cmd);
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return 0;
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}
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#else
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#ifdef CONFIG_PCI_EHCI_DEVICE
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static struct pci_device_id ehci_pci_ids[] = {
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/* Please add supported PCI EHCI controller ids here */
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{0x1033, 0x00E0}, /* NEC */
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{0x10B9, 0x5239}, /* ULI1575 PCI EHCI module ids */
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{0x12D8, 0x400F}, /* Pericom */
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{0, 0}
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};
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#endif
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static void ehci_pci_legacy_init(pci_dev_t pdev, struct ehci_hccr **ret_hccr,
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struct ehci_hcor **ret_hcor)
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{
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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u32 cmd;
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hccr = (struct ehci_hccr *)pci_map_bar(pdev,
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PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
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hcor = (struct ehci_hcor *)((uintptr_t) hccr +
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HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n",
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(u32)hccr, (u32)hcor,
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(u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
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*ret_hccr = hccr;
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*ret_hcor = hcor;
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/* enable busmaster */
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pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
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cmd |= PCI_COMMAND_MASTER;
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pci_write_config_dword(pdev, PCI_COMMAND, cmd);
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}
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*/
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor)
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{
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pci_dev_t pdev;
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#ifdef CONFIG_PCI_EHCI_DEVICE
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pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE);
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#else
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pdev = pci_find_class(PCI_CLASS_SERIAL_USB_EHCI, index);
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#endif
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if (pdev < 0) {
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printf("EHCI host controller not found\n");
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return -1;
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}
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ehci_pci_legacy_init(pdev, ret_hccr, ret_hcor);
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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return 0;
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}
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#endif /* nCONFIG_DM_USB */
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#ifdef CONFIG_DM_USB
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static int ehci_pci_probe(struct udevice *dev)
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{
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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int ret;
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ret = ehci_pci_init(dev, &hccr, &hcor);
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if (ret)
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return ret;
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return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
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}
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static int ehci_pci_remove(struct udevice *dev)
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{
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struct ehci_pci_priv *priv = dev_get_priv(dev);
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int ret;
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ret = ehci_deregister(dev);
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if (ret)
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return ret;
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return ehci_shutdown_phy(dev, &priv->phy);
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}
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static const struct udevice_id ehci_pci_ids[] = {
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{ .compatible = "ehci-pci" },
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{ }
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};
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U_BOOT_DRIVER(ehci_pci) = {
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.name = "ehci_pci",
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.id = UCLASS_USB,
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.probe = ehci_pci_probe,
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.remove = ehci_pci_remove,
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.of_match = ehci_pci_ids,
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.ops = &ehci_usb_ops,
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.platdata_auto_alloc_size = sizeof(struct usb_platdata),
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.priv_auto_alloc_size = sizeof(struct ehci_pci_priv),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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static struct pci_device_id ehci_pci_supported[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI, ~0) },
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{},
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};
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U_BOOT_PCI_DEVICE(ehci_pci, ehci_pci_supported);
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#endif /* CONFIG_DM_USB */
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