mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
6d0f6bcf33
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
506 lines
11 KiB
C
506 lines
11 KiB
C
/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Hacked for the Hymod board by Murray.Jensen@csiro.au, 20-Oct-00
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*/
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#include <common.h>
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#include <mpc8260.h>
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#include <board/hymod/flash.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*-----------------------------------------------------------------------
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* Protection Flags:
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*/
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#define FLAG_PROTECT_SET 0x01
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#define FLAG_PROTECT_CLEAR 0x02
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/*-----------------------------------------------------------------------
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*/
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/*
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* probe for flash bank at address "base" and store info about it
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* in the flash_info entry "fip". Fatal error if nothing there.
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*/
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static void
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bank_probe (flash_info_t *fip, volatile bank_addr_t base)
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{
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volatile bank_addr_t addr;
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bank_word_t word;
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int i;
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/* reset the flash */
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*base = BANK_CMD_RST;
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/* put flash into read id mode */
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*base = BANK_CMD_RD_ID;
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/* check the manufacturer id - must be intel */
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word = *BANK_REG_MAN_CODE (base);
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if (word != BANK_FILL_WORD (INTEL_MANUFACT&0xff))
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panic ("\nbad manufacturer's code (0x%08lx) at addr 0x%08lx",
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(unsigned long)word, (unsigned long)base);
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/* check the device id */
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word = *BANK_REG_DEV_CODE (base);
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switch (word) {
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case BANK_FILL_WORD (INTEL_ID_28F320J5&0xff):
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fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J5;
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fip->sector_count = 32;
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break;
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case BANK_FILL_WORD (INTEL_ID_28F640J5&0xff):
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fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J5;
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fip->sector_count = 64;
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break;
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case BANK_FILL_WORD (INTEL_ID_28F320J3A&0xff):
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fip->flash_id = FLASH_MAN_INTEL | FLASH_28F320J3A;
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fip->sector_count = 32;
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break;
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case BANK_FILL_WORD (INTEL_ID_28F640J3A&0xff):
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fip->flash_id = FLASH_MAN_INTEL | FLASH_28F640J3A;
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fip->sector_count = 64;
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break;
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case BANK_FILL_WORD (INTEL_ID_28F128J3A&0xff):
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fip->flash_id = FLASH_MAN_INTEL | FLASH_28F128J3A;
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fip->sector_count = 128;
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break;
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default:
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panic ("\nbad device code (0x%08lx) at addr 0x%08lx",
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(unsigned long)word, (unsigned long)base);
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}
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if (fip->sector_count >= CONFIG_SYS_MAX_FLASH_SECT)
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panic ("\ntoo many sectors (%d) in flash at address 0x%08lx",
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fip->sector_count, (unsigned long)base);
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addr = base;
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for (i = 0; i < fip->sector_count; i++) {
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fip->start[i] = (unsigned long)addr;
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fip->protect[i] = 0;
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addr = BANK_ADDR_NEXT_BLK (addr);
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}
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fip->size = (bank_size_t)addr - (bank_size_t)base;
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/* reset the flash */
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*base = BANK_CMD_RST;
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}
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static void
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bank_reset (flash_info_t *info, int sect)
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{
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volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
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#ifdef FLASH_DEBUG
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printf ("writing reset cmd to addr 0x%08lx\n", (unsigned long)addr);
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#endif
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*addr = BANK_CMD_RST;
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}
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static void
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bank_erase_init (flash_info_t *info, int sect)
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{
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volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
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int flag;
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#ifdef FLASH_DEBUG
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printf ("erasing sector %d, addr = 0x%08lx\n",
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sect, (unsigned long)addr);
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#endif
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/* Disable intrs which might cause a timeout here */
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flag = disable_interrupts ();
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#ifdef FLASH_DEBUG
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printf ("writing erase cmd to addr 0x%08lx\n", (unsigned long)addr);
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#endif
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*addr = BANK_CMD_ERASE1;
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*addr = BANK_CMD_ERASE2;
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts ();
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}
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static int
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bank_erase_poll (flash_info_t *info, int sect)
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{
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volatile bank_addr_t addr = (bank_addr_t)info->start[sect];
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bank_word_t stat = *addr;
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#ifdef FLASH_DEBUG
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printf ("checking status at addr 0x%08lx [0x%08lx]\n",
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(unsigned long)addr, (unsigned long)stat);
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#endif
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if ((stat & BANK_STAT_RDY) == BANK_STAT_RDY) {
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if ((stat & BANK_STAT_ERR) != 0) {
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printf ("failed on sector %d [0x%08lx] at "
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"address 0x%08lx\n", sect,
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(unsigned long)stat, (unsigned long)addr);
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*addr = BANK_CMD_CLR_STAT;
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return (-1);
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}
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else
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return (1);
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}
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else
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return (0);
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}
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static int
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bank_write_word (volatile bank_addr_t addr, bank_word_t value)
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{
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bank_word_t stat;
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ulong start;
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int flag, retval;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts ();
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*addr = BANK_CMD_PROG;
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*addr = value;
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts ();
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retval = 0;
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/* data polling for D7 */
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start = get_timer (0);
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do {
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if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
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retval = 1;
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goto done;
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}
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stat = *addr;
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} while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
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if ((stat & BANK_STAT_ERR) != 0) {
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printf ("flash program failed [0x%08lx] at address 0x%08lx\n",
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(unsigned long)stat, (unsigned long)addr);
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*addr = BANK_CMD_CLR_STAT;
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retval = 3;
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}
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done:
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/* reset to read mode */
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*addr = BANK_CMD_RST;
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return (retval);
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}
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/*-----------------------------------------------------------------------
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*/
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unsigned long
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flash_init (void)
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{
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int i;
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/* Init: no FLASHes known */
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for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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}
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bank_probe (&flash_info[0], (bank_addr_t)CONFIG_SYS_FLASH_BASE);
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/*
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* protect monitor and environment sectors
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*/
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#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
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(void)flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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#if defined(CONFIG_SYS_FLASH_ENV_ADDR)
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(void)flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_ENV_ADDR,
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#if defined(CONFIG_SYS_FLASH_ENV_BUF)
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CONFIG_SYS_FLASH_ENV_ADDR + CONFIG_SYS_FLASH_ENV_BUF - 1,
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#else
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CONFIG_SYS_FLASH_ENV_ADDR + CONFIG_SYS_FLASH_ENV_SIZE - 1,
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#endif
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&flash_info[0]);
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#endif
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return flash_info[0].size;
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}
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/*-----------------------------------------------------------------------
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*/
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void
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flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL: printf ("INTEL "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F320J5: printf ("28F320J5 (32 Mbit, 2 x 16bit)\n");
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break;
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case FLASH_28F640J5: printf ("28F640J5 (64 Mbit, 2 x 16bit)\n");
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break;
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case FLASH_28F320J3A: printf ("28F320J3A (32 Mbit, 2 x 16bit)\n");
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break;
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case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 2 x 16bit)\n");
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break;
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case FLASH_28F128J3A: printf ("28F320J3A (128 Mbit, 2 x 16bit)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " "
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);
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}
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printf ("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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/*-----------------------------------------------------------------------
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*/
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int
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flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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int prot, sect, haderr;
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ulong start, now, last;
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int rcode = 0;
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#ifdef FLASH_DEBUG
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printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
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" Bank # %d: ", s_last - s_first + 1, s_first, s_last,
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(info - flash_info) + 1);
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flash_print_info (info);
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#endif
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sector%s will not be erased\n",
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prot, (prot > 1 ? "s" : ""));
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}
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start = get_timer (0);
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last = 0;
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haderr = 0;
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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ulong estart;
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int sectdone;
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bank_erase_init (info, sect);
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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estart = get_timer (start);
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do {
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now = get_timer (start);
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if (now - estart > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf ("Timeout (sect %d)\n", sect);
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haderr = 1;
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rcode = 1;
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break;
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}
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#ifndef FLASH_DEBUG
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc ('.');
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last = now;
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}
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#endif
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sectdone = bank_erase_poll (info, sect);
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if (sectdone < 0) {
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haderr = 1;
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rcode = 1;
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break;
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}
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} while (!sectdone);
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if (haderr)
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break;
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}
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}
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if (haderr > 0)
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printf (" failed\n");
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else
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printf (" done\n");
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/* reset to read mode */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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bank_reset (info, sect);
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}
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}
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return rcode;
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 3 - Program failed
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*/
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static int
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write_word (flash_info_t *info, ulong dest, ulong data)
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{
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/* Check if Flash is (sufficiently) erased */
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if ((*(ulong *)dest & data) != data)
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return (2);
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return (bank_write_word ((bank_addr_t)dest, (bank_word_t)data));
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 3 - Program failed
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*/
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int
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write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong cp, wp, data;
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int i, l, rc;
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wp = (addr & ~3); /* get lower word aligned address */
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i=0, cp=wp; i<l; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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for (; i<4 && cnt>0; ++i) {
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data = (data << 8) | *src++;
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--cnt;
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++cp;
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}
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for (; cnt==0 && i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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if ((rc = write_word (info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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}
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/*
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* handle word aligned part
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*/
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while (cnt >= 4) {
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data = 0;
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for (i=0; i<4; ++i) {
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data = (data << 8) | *src++;
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}
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if ((rc = write_word (info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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cnt -= 4;
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}
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if (cnt == 0) {
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return (0);
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
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data = (data << 8) | *src++;
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--cnt;
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}
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for (; i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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return (write_word (info, wp, data));
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}
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/*-----------------------------------------------------------------------
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*/
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