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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
176 lines
4.3 KiB
C
176 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <command.h>
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#include <dm.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <misc.h>
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/* OTP Register Offsets */
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#define OTPC_SBPI_CTRL 0x0020
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#define OTPC_SBPI_CMD_VALID_PRE 0x0024
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#define OTPC_SBPI_CS_VALID_PRE 0x0028
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#define OTPC_SBPI_STATUS 0x002C
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#define OTPC_USER_CTRL 0x0100
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#define OTPC_USER_ADDR 0x0104
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#define OTPC_USER_ENABLE 0x0108
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#define OTPC_USER_QP 0x0120
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#define OTPC_USER_Q 0x0124
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#define OTPC_INT_STATUS 0x0304
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#define OTPC_SBPI_CMD0_OFFSET 0x1000
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#define OTPC_SBPI_CMD1_OFFSET 0x1004
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/* OTP Register bits and masks */
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#define OTPC_USER_ADDR_MASK GENMASK(31, 16)
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#define OTPC_USE_USER BIT(0)
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#define OTPC_USE_USER_MASK GENMASK(16, 16)
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#define OTPC_USER_FSM_ENABLE BIT(0)
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#define OTPC_USER_FSM_ENABLE_MASK GENMASK(16, 16)
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#define OTPC_SBPI_DONE BIT(1)
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#define OTPC_USER_DONE BIT(2)
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#define SBPI_DAP_ADDR 0x02
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#define SBPI_DAP_ADDR_SHIFT 8
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#define SBPI_DAP_ADDR_MASK GENMASK(31, 24)
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#define SBPI_CMD_VALID_MASK GENMASK(31, 16)
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#define SBPI_DAP_CMD_WRF 0xC0
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#define SBPI_DAP_REG_ECC 0x3A
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#define SBPI_ECC_ENABLE 0x00
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#define SBPI_ECC_DISABLE 0x09
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#define SBPI_ENABLE BIT(0)
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#define SBPI_ENABLE_MASK GENMASK(16, 16)
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#define OTPC_TIMEOUT 10000
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struct rockchip_otp_platdata {
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void __iomem *base;
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unsigned long secure_conf_base;
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unsigned long otp_mask_base;
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};
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static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
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u32 flag)
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{
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int delay = OTPC_TIMEOUT;
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while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
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udelay(1);
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delay--;
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if (delay <= 0) {
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printf("%s: wait init status timeout\n", __func__);
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return -ETIMEDOUT;
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}
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}
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/* clean int status */
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writel(flag, otp->base + OTPC_INT_STATUS);
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return 0;
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}
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static int rockchip_otp_ecc_enable(struct rockchip_otp_platdata *otp,
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bool enable)
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{
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int ret = 0;
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writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
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otp->base + OTPC_SBPI_CTRL);
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writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE);
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writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC,
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otp->base + OTPC_SBPI_CMD0_OFFSET);
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if (enable)
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writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
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else
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writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
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writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
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ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
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if (ret < 0)
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printf("%s timeout during ecc_enable\n", __func__);
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return ret;
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}
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static int rockchip_px30_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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u8 *buffer = buf;
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int ret = 0;
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ret = rockchip_otp_ecc_enable(otp, false);
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if (ret < 0) {
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printf("%s rockchip_otp_ecc_enable err\n", __func__);
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return ret;
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}
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writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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udelay(5);
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while (size--) {
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writel(offset++ | OTPC_USER_ADDR_MASK,
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otp->base + OTPC_USER_ADDR);
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writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
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otp->base + OTPC_USER_ENABLE);
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ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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goto read_end;
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}
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*buffer++ = readb(otp->base + OTPC_USER_Q);
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}
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read_end:
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writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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return ret;
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}
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static int rockchip_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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return rockchip_px30_otp_read(dev, offset, buf, size);
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}
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static const struct misc_ops rockchip_otp_ops = {
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.read = rockchip_otp_read,
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};
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static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
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{
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struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
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otp->base = dev_read_addr_ptr(dev);
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return 0;
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}
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static const struct udevice_id rockchip_otp_ids[] = {
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{
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.compatible = "rockchip,px30-otp",
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.data = (ulong)&rockchip_px30_otp_read,
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},
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{
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.compatible = "rockchip,rk3308-otp",
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.data = (ulong)&rockchip_px30_otp_read,
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},
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{}
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};
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U_BOOT_DRIVER(rockchip_otp) = {
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.name = "rockchip_otp",
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.id = UCLASS_MISC,
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.of_match = rockchip_otp_ids,
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.ops = &rockchip_otp_ops,
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.ofdata_to_platdata = rockchip_otp_ofdata_to_platdata,
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.platdata_auto = sizeof(struct rockchip_otp_platdata),
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};
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