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https://github.com/AsahiLinux/u-boot
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d41b358fb3
The SG_* macros represent the address of SoC-glue registers. For a planned new SoC, its base address will be changed. Turn the SG_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
47 lines
1 KiB
C
47 lines
1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Socionext Inc.
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*/
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#include <common.h>
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#include <spl.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc64-regs.h"
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#include "../sg-regs.h"
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#define SDCTRL_EMMC_HW_RESET 0x59810280
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void uniphier_ld11_clk_init(void)
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{
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/* if booted from a device other than USB, without stand-by MPU */
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if ((readl(sg_base + SG_PINMON0) & BIT(27)) &&
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uniphier_boot_device_raw() != BOOT_DEVICE_USB) {
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writel(1, sg_base + SG_ETPHYPSHUT);
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writel(1, sg_base + SG_ETPHYCNT);
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udelay(1); /* wait for regulator level 1.1V -> 2.5V */
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writel(3, sg_base + SG_ETPHYCNT);
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writel(3, sg_base + SG_ETPHYPSHUT);
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writel(7, sg_base + SG_ETPHYCNT);
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}
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/* TODO: use "mmc-pwrseq-emmc" */
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writel(1, SDCTRL_EMMC_HW_RESET);
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#ifdef CONFIG_USB_EHCI_HCD
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{
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int ch;
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for (ch = 0; ch < 3; ch++) {
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void __iomem *phyctrl = sg_base + SG_USBPHYCTRL;
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writel(0x82280600, phyctrl + 8 * ch);
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writel(0x00000106, phyctrl + 8 * ch + 4);
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}
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}
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#endif
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}
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