mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 00:47:26 +00:00
58dac32764
Before this commit, CONFIG_MPC8260 and CONFIG_8260
were used mixed-up.
All boards with mpc8260 cpu defined both of them:
- CONFIG_MPC8260 was defined in board config headers
and include/common.h
- CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk
We do not need to have both of them.
This commit keeps only CONFIG_MPC8260.
This commit does:
- Delete CONFIG_8260 and CONFIG_MPC8260 definition
in config headers and include/common.h
- Rename CONFIG_8260 to CONFIG_MPC8260
in arch/powerpc/cpu/mpc8260/config.mk.
- Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
189 lines
5 KiB
C
189 lines
5 KiB
C
/*
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* Simple serial driver for Cogent motherboard serial ports
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* for use during boot
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*/
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#include <common.h>
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#include "serial.h"
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#include <serial.h>
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#include <linux/compiler.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
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#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
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(defined(CONFIG_MPC8260) && defined(CONFIG_CONS_NONE))
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#if CONFIG_CONS_INDEX == 1
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#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
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#elif CONFIG_CONS_INDEX == 2
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#define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
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#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
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#define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
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#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
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#define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
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#else
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#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
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#endif
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static int cogent_serial_init(void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
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cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
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serial_setbrg ();
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cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
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cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
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cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
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return (0);
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}
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static void cogent_serial_setbrg(void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
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unsigned int divisor;
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unsigned char lcr;
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if ((divisor = br_to_div (gd->baudrate)) == 0)
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divisor = DEFDIV;
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lcr = cma_mb_reg_read (&mbsp->ser_lcr);
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cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */
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cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
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cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
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cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
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}
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static void cogent_serial_putc(const char c)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
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if (c == '\n')
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serial_putc ('\r');
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while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
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cma_mb_reg_write (&mbsp->ser_thr, c);
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}
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static int cogent_serial_getc(void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
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while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
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return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
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}
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static int cogent_serial_tstc(void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
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return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
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}
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static struct serial_device cogent_serial_drv = {
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.name = "cogent_serial",
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.start = cogent_serial_init,
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.stop = NULL,
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.setbrg = cogent_serial_setbrg,
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.putc = cogent_serial_putc,
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.puts = default_serial_puts,
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.getc = cogent_serial_getc,
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.tstc = cogent_serial_tstc,
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};
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void cogent_serial_initialize(void)
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{
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serial_register(&cogent_serial_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &cogent_serial_drv;
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}
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#endif /* CONS_NONE */
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#if defined(CONFIG_CMD_KGDB) && \
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defined(CONFIG_KGDB_NONE)
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#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
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#error Console and kgdb are on the same serial port - this is not supported
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#endif
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#if CONFIG_KGDB_INDEX == 1
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#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
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#elif CONFIG_KGDB_INDEX == 2
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#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
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#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
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#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
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#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
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#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
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#else
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#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
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#endif
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void kgdb_serial_init (void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
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unsigned int divisor;
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if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
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divisor = DEFDIV;
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cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
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cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */
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cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
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cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
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cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
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cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
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cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
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printf ("[on cma10x serial port B] ");
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}
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void putDebugChar (int c)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
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while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
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cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
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}
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void putDebugStr (const char *str)
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{
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while (*str != '\0') {
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if (*str == '\n')
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putDebugChar ('\r');
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putDebugChar (*str++);
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}
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}
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int getDebugChar (void)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
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while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
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return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
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}
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void kgdb_interruptible (int yes)
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{
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cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
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if (yes == 1) {
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printf ("kgdb: turning serial ints on\n");
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cma_mb_reg_write (&mbsp->ser_ier, 0xf);
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} else {
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printf ("kgdb: turning serial ints off\n");
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cma_mb_reg_write (&mbsp->ser_ier, 0x0);
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}
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}
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#endif /* KGDB && KGDB_NONE */
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#endif /* CAPS & SERPAR */
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