Andre Przywara 7400d34ba9 riscv: semihosting: replace inline assembly with assembly file ... So far we used inline assembly to inject the actual instruction that triggers the semihosting service. While this sounds elegant, as it's really only about a few instructions, it has some serious downsides: - We need some barriers in place to force the compiler to issue writes to a data structure before issuing the trap instruction. - We need to convince the compiler to actually fill the structures that we use pointers to. - We need a memory clobber to avoid the compiler caching the data in those structures, when semihosting writes data back. - We need register arguments to make sure the function ID and the pointer land in the right registers. This is all doable, but fragile and somewhat cumbersome. Since we now have a separate function in an extra file anyway, we can do away with all the magic and just write that in an actual assembler. This is much more readable and robust. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>		2023-03-06 19:24:34 -05:00
..
andes_plicsw.c	riscv: Rename Andes PLIC to PLICSW	2022-11-03 13:27:56 +08:00
asm-offsets.c	riscv: Introduce AVAILABLE_HARTS	2022-09-26 14:29:13 +08:00
boot.c	command: Remove the cmd_tbl_t typedef	2020-05-18 18:36:55 -04:00
bootm.c	Correct SPL uses of LMB	2023-02-10 07:41:39 -05:00
cache.c	common: board_r: support enable_caches for RISC-V	2021-09-07 10:34:29 +08:00
crt0_riscv_efi.S	efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE	2022-12-29 10:51:50 +01:00
elf_riscv32_efi.lds	efi_loader: fix SectionAlignment, FileAlignment	2022-01-15 10:57:22 +01:00
elf_riscv64_efi.lds	efi_loader: fix SectionAlignment, FileAlignment	2022-01-15 10:57:22 +01:00
fdt_fixup.c	fdtdec: Support reserved-memory flags	2021-10-13 14:18:30 -07:00
image.c	riscv: booti: do not force relocation if force_reloc is not set	2021-07-21 16:38:26 +08:00
interrupts.c	arch/riscv: add semihosting support for RISC-V	2022-12-08 15:15:58 +08:00
Makefile	arch/riscv: add semihosting support for RISC-V	2022-12-08 15:15:58 +08:00
memcpy.S	riscv: memcpy: check src and dst before copy	2023-02-01 16:17:45 +08:00
memmove.S	riscv: Fix memmove and optimise memcpy when misalign	2021-05-17 16:47:33 +08:00
memset.S	riscv: assembler versions of memcpy, memmove, memset	2021-04-08 15:37:29 +08:00
reloc_riscv_efi.c	riscv: Remove unused _relocate arguments	2018-07-19 16:31:37 -04:00
reset.c	Revert "riscv: Allow use of reset drivers"	2020-07-24 14:55:31 +08:00
sbi.c	riscv: provide missing base extension functions	2022-04-06 09:40:05 +08:00
sbi_ipi.c	riscv: Clean up IPI initialization code	2020-07-01 15:01:22 +08:00
semihosting.S	riscv: semihosting: replace inline assembly with assembly file	2023-03-06 19:24:34 -05:00
setjmp.S	riscv: simplify longjmp	2021-04-08 15:37:29 +08:00
sifive_cache.c	riscv: lib: implement enable_caches for sifive cache	2021-09-07 10:34:29 +08:00
sifive_clint.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
smp.c	dm: core: Drop ofnode_is_available()	2022-09-29 16:11:31 -04:00
spl.c	event: Convert arch_cpu_init_dm() to use events	2022-03-10 08:28:36 -05:00